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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2006-10-03 17:27:58 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2006-10-03 17:27:58 +0000 |
| commit | 68d238801ccc180ecfc92e20174a5ca268ca2d6e (patch) | |
| tree | 8eeffa19a669b873835abd080b981a1a2cdb72e3 | |
| parent | f598d731424914dcd04ee445adbe720647ca6157 (diff) | |
| download | bcm5719-llvm-68d238801ccc180ecfc92e20174a5ca268ca2d6e.tar.gz bcm5719-llvm-68d238801ccc180ecfc92e20174a5ca268ca2d6e.zip | |
Implement floating point constants
llvm-svn: 30704
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/README.txt | 4 | ||||
| -rw-r--r-- | llvm/test/Regression/CodeGen/ARM/fp.ll | 9 |
4 files changed, 19 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index e4b591d6752..2adf4073ba0 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -61,6 +61,9 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) setOperationAction(ISD::VASTART, MVT::Other, Custom); setOperationAction(ISD::VAEND, MVT::Other, Expand); + setOperationAction(ISD::ConstantFP, MVT::f64, Expand); + setOperationAction(ISD::ConstantFP, MVT::f32, Expand); + setSchedulingPreference(SchedulingForRegPressure); computeRegisterProperties(); } diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index d7c096f37b2..55128de930d 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -100,6 +100,10 @@ def ldr : InstARM<(ops IntRegs:$dst, memri:$addr), "ldr $dst, $addr", [(set IntRegs:$dst, (load iaddr:$addr))]>; +def FLDS : InstARM<(ops FPRegs:$dst, IntRegs:$addr), + "flds $dst, $addr", + [(set FPRegs:$dst, (load IntRegs:$addr))]>; + def str : InstARM<(ops IntRegs:$src, memri:$addr), "str $src, $addr", [(store IntRegs:$src, iaddr:$addr)]>; diff --git a/llvm/lib/Target/ARM/README.txt b/llvm/lib/Target/ARM/README.txt index 736d776fd87..ae94b8f6bfe 100644 --- a/llvm/lib/Target/ARM/README.txt +++ b/llvm/lib/Target/ARM/README.txt @@ -28,3 +28,7 @@ mov r1, r1, lsl r2 add r0, r1, r0 ---------------------------------------------------------- + +add an offset to FLDS addressing mode + +---------------------------------------------------------- diff --git a/llvm/test/Regression/CodeGen/ARM/fp.ll b/llvm/test/Regression/CodeGen/ARM/fp.ll index af5a69642c4..3cf45fcddb2 100644 --- a/llvm/test/Regression/CodeGen/ARM/fp.ll +++ b/llvm/test/Regression/CodeGen/ARM/fp.ll @@ -3,7 +3,9 @@ ; RUN: llvm-as < %s | llc -march=arm | grep fsitos && ; RUN: llvm-as < %s | llc -march=arm | grep fmrs && ; RUN: llvm-as < %s | llc -march=arm | grep fsitod && -; RUN: llvm-as < %s | llc -march=arm | grep fmrrd +; RUN: llvm-as < %s | llc -march=arm | grep fmrrd && +; RUN: llvm-as < %s | llc -march=arm | grep flds && +; RUN: llvm-as < %s | llc -march=arm | grep ".word.*1065353216" float %f(int %a) { entry: @@ -16,3 +18,8 @@ entry: %tmp = cast int %a to double ; <double> [#uses=1] ret double %tmp } + +float %h() { +entry: + ret float 1.000000e+00 +} |
