[ASan] Really fix zero_page_pc test for PowerPC

Summary:
As a follow-up to D6167, this patch fixes the test to account for
another difference between PowerPC and x86 systems.

On x86 if you branch to an invalid address, you get a SIGSEGV with PC
set to the invalid address (and si_addr in the siginfo struct also set
to the same address).

On PowerPC, you get a SIGSEGV with PC pointing at the branch
instruction, but si_addr set to the invalid address.

You can see this difference if you run the test case under gdb.

Reviewers: kcc, glider, samsonov

Reviewed By: samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6226

llvm-svn: 221929

1 files changed, 3 insertions, 1 deletions

diff --git a/compiler-rt/test/asan/TestCases/zero_page_pc.cc b/compiler-rt/test/asan/TestCases/zero_page_pc.cc
index f8bf1d92650..613eea23d53 100644
--- a/compiler-rt/test/asan/TestCases/zero_page_pc.cc
+++ b/compiler-rt/test/asan/TestCases/zero_page_pc.cc
@@ -8,6 +8,8 @@ typedef void void_f();
 int main() {
   void_f *func = (void_f *)0x4;
   func();
-  // CHECK: {{AddressSanitizer: SEGV.*(pc.*0004)}}
+  // x86 reports the SEGV with both address=4 and pc=4.
+  // PowerPC64 reports it with address=4 but pc still in main().
+  // CHECK: {{AddressSanitizer: SEGV.*(address|pc) 0x0*4}}
   return 0;
 }