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| author | Dan Gohman <gohman@apple.com> | 2008-08-14 22:43:26 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-08-14 22:43:26 +0000 |
| commit | 65d83ccf26c8851f02ffea50a18c36c1c10fc2fe (patch) | |
| tree | 92e14ca1482de9adf41c0fa6a16f6d5e76a64f93 | |
| parent | c7138bb0a7627e3259e1d943b3d877b2ad98614c (diff) | |
| download | bcm5719-llvm-65d83ccf26c8851f02ffea50a18c36c1c10fc2fe.tar.gz bcm5719-llvm-65d83ccf26c8851f02ffea50a18c36c1c10fc2fe.zip | |
Don't try to use the insertps instruction for vector
element inserts with non-constant indices. This fixes
CodeGen/X86/vector-variable-idx.ll on machines that
have SSE4.1.
llvm-svn: 54801
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 57ed8b3122d..6b95034c02b 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4153,7 +4153,7 @@ X86TargetLowering::LowerINSERT_VECTOR_ELT_SSE4(SDValue Op, SelectionDAG &DAG){ if (N2.getValueType() != MVT::i32) N2 = DAG.getIntPtrConstant(cast<ConstantSDNode>(N2)->getValue()); return DAG.getNode(Opc, VT, N0, N1, N2); - } else if (EVT == MVT::f32) { + } else if (EVT == MVT::f32 && isa<ConstantSDNode>(N2)) { // Bits [7:6] of the constant are the source select. This will always be // zero here. The DAG Combiner may combine an extract_elt index into these // bits. For example (insert (extract, 3), 2) could be matched by putting |
