diff options
author | Philip Reames <listmail@philipreames.com> | 2019-10-03 20:24:18 +0000 |
---|---|---|
committer | Philip Reames <listmail@philipreames.com> | 2019-10-03 20:24:18 +0000 |
commit | 65d63ac05a2a12a1e1e7ed3c048c4ea71d224c28 (patch) | |
tree | b1462045dec89b13545bf7d3acf422c73355e6ff | |
parent | 230cf9a36022ce3adbe67fb43486209f3e944883 (diff) | |
download | bcm5719-llvm-65d63ac05a2a12a1e1e7ed3c048c4ea71d224c28.tar.gz bcm5719-llvm-65d63ac05a2a12a1e1e7ed3c048c4ea71d224c28.zip |
[Test] Fix inconsistency in alignment in test case
The IR was using a fixed 8 byte alignment, but the MIR portion was using native alignment. Since the test doesn't appear to be deliberately testing overalignment, just make the IR match the MIR.
llvm-svn: 373658
-rw-r--r-- | llvm/test/CodeGen/X86/GlobalISel/select-memop-scalar-unordered.mir | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-memop-scalar-unordered.mir b/llvm/test/CodeGen/X86/GlobalISel/select-memop-scalar-unordered.mir index d9016f907d1..e963104ca5c 100644 --- a/llvm/test/CodeGen/X86/GlobalISel/select-memop-scalar-unordered.mir +++ b/llvm/test/CodeGen/X86/GlobalISel/select-memop-scalar-unordered.mir @@ -6,17 +6,17 @@ --- | define i8 @test_load_i8(i8* %p1) { - %r = load atomic i8, i8* %p1 unordered, align 8 + %r = load atomic i8, i8* %p1 unordered, align 1 ret i8 %r } define i16 @test_load_i16(i16* %p1) { - %r = load atomic i16, i16* %p1 unordered, align 8 + %r = load atomic i16, i16* %p1 unordered, align 2 ret i16 %r } define i32 @test_load_i32(i32* %p1) { - %r = load atomic i32, i32* %p1 unordered, align 8 + %r = load atomic i32, i32* %p1 unordered, align 4 ret i32 %r } @@ -26,7 +26,7 @@ } define float @test_load_float(float* %p1) { - %r = load atomic float, float* %p1 unordered, align 8 + %r = load atomic float, float* %p1 unordered, align 4 ret float %r } @@ -46,7 +46,7 @@ } define i32* @test_store_i32(i32 %val, i32* %p1) { - store atomic i32 %val, i32* %p1 unordered, align 8 + store atomic i32 %val, i32* %p1 unordered, align 4 ret i32* %p1 } @@ -56,12 +56,12 @@ } define float* @test_store_float(float %val, float* %p1) { - store atomic float %val, float* %p1 unordered, align 8 + store atomic float %val, float* %p1 unordered, align 4 ret float* %p1 } define float* @test_store_float_vec(float %val, float* %p1) { - store atomic float %val, float* %p1 unordered, align 8 + store atomic float %val, float* %p1 unordered, align 4 ret float* %p1 } |