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authorSaleem Abdulrasool <compnerd@compnerd.org>2014-06-12 20:06:33 +0000
committerSaleem Abdulrasool <compnerd@compnerd.org>2014-06-12 20:06:33 +0000
commit65ca57a41815af432ff428d3383b0c23d0ea7677 (patch)
treea25fe18d2e6ce6c9196f065ce070d6e6afeff468
parenta766029b81937aafb0ee7e83a6252e51eb1f9c34 (diff)
downloadbcm5719-llvm-65ca57a41815af432ff428d3383b0c23d0ea7677.tar.gz
bcm5719-llvm-65ca57a41815af432ff428d3383b0c23d0ea7677.zip
CodeGen: enable mov.w/mov.t pairs with minsize for WoA
Windows on ARM uses COFF/PE which is intrinsically position independent. For the case of 32-bit immediates, use a pair-wise relocation as otherwise we may exceed the range of operators. This fixes a code generation crash when using -Oz when targeting Windows on ARM. llvm-svn: 210814
-rw-r--r--llvm/lib/Target/ARM/ARMSubtarget.h7
-rw-r--r--llvm/test/CodeGen/ARM/Windows/global-minsize.ll16
2 files changed, 22 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h
index 2694c34293a..6abae8b3cde 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.h
+++ b/llvm/lib/Target/ARM/ARMSubtarget.h
@@ -379,7 +379,12 @@ public:
bool isR9Reserved() const { return IsR9Reserved; }
- bool useMovt() const { return UseMovt && !isMinSize(); }
+ bool useMovt() const {
+ // NOTE Windows on ARM needs to use mov.w/mov.t pairs to materialise 32-bit
+ // immediates as it is inherently position independent, and may be out of
+ // range otherwise.
+ return UseMovt && (isTargetWindows() || !isMinSize());
+ }
bool supportsTailCall() const { return SupportsTailCall; }
bool allowsUnalignedMem() const { return AllowsUnalignedMem; }
diff --git a/llvm/test/CodeGen/ARM/Windows/global-minsize.ll b/llvm/test/CodeGen/ARM/Windows/global-minsize.ll
new file mode 100644
index 00000000000..c0be36caa6c
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/Windows/global-minsize.ll
@@ -0,0 +1,16 @@
+; RUN: llc -mtriple=thumbv7-windows -filetype asm -o - %s | FileCheck %s
+
+@i = internal global i32 0, align 4
+
+; Function Attrs: minsize
+define arm_aapcs_vfpcc i32* @function() #0 {
+entry:
+ ret i32* @i
+}
+
+attributes #0 = { minsize }
+
+; CHECK: function:
+; CHECK: movw r0, :lower16:i
+; CHECK: movt r0, :upper16:i
+; CHECK: bx lr
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