summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChandler Carruth <chandlerc@gmail.com>2014-07-27 01:45:49 +0000
committerChandler Carruth <chandlerc@gmail.com>2014-07-27 01:45:49 +0000
commit64a7c828cb7c6c389f05fd4be51ae2ef6a71b7d9 (patch)
treed26b256a19ee77631b6479d4a80161e83369cdf9
parent80c5bfd8436f9159769b66667019688c681db0cd (diff)
downloadbcm5719-llvm-64a7c828cb7c6c389f05fd4be51ae2ef6a71b7d9.tar.gz
bcm5719-llvm-64a7c828cb7c6c389f05fd4be51ae2ef6a71b7d9.zip
[x86] Sink a variable only used by asserts into the asserts. Should fix
some -Werror bots, sorry for the noise. llvm-svn: 214043
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index ff598835404..38a6ba0d91f 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -18871,9 +18871,9 @@ static bool combineX86ShufflesRecursively(SDValue Op, SDValue Root,
if (VT.getSizeInBits() != 128)
return false;
- MVT RootVT = Root.getSimpleValueType();
- assert(RootVT.isVector() && "Shuffles operate on vector types!");
- assert(VT.getSizeInBits() == RootVT.getSizeInBits() &&
+ assert(Root.getSimpleValueType().isVector() &&
+ "Shuffles operate on vector types!");
+ assert(VT.getSizeInBits() == Root.getSimpleValueType().getSizeInBits() &&
"Can only combine shuffles of the same vector register size.");
if (!isTargetShuffle(Op.getOpcode()))
OpenPOWER on IntegriCloud