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authorDavid Majnemer <david.majnemer@gmail.com>2015-06-24 21:52:25 +0000
committerDavid Majnemer <david.majnemer@gmail.com>2015-06-24 21:52:25 +0000
commit63d606bdcb606ace3cea3455dcaf0c3dac108d4e (patch)
tree63e5d3fe1b43b2f897b6f20ede0d42f4cd184191
parentb5fb2d461b917adc610817ee0d9c27a9b6fc2c03 (diff)
downloadbcm5719-llvm-63d606bdcb606ace3cea3455dcaf0c3dac108d4e.tar.gz
bcm5719-llvm-63d606bdcb606ace3cea3455dcaf0c3dac108d4e.zip
[GVN] Intersect the IR flags when CSE'ing two instructions
We performed a simple, but incomplete, intersection when it came time to CSE instructions. It didn't handle, for example, the 'exact' flag. This fixes PR23922. llvm-svn: 240595
-rw-r--r--llvm/lib/Transforms/Scalar/GVN.cpp10
-rw-r--r--llvm/test/Transforms/GVN/pr12979.ll14
2 files changed, 17 insertions, 7 deletions
diff --git a/llvm/lib/Transforms/Scalar/GVN.cpp b/llvm/lib/Transforms/Scalar/GVN.cpp
index 6aee033b5dc..e93833c32f4 100644
--- a/llvm/lib/Transforms/Scalar/GVN.cpp
+++ b/llvm/lib/Transforms/Scalar/GVN.cpp
@@ -1783,13 +1783,9 @@ static void patchReplacementInstruction(Instruction *I, Value *Repl) {
// being replaced.
BinaryOperator *Op = dyn_cast<BinaryOperator>(I);
BinaryOperator *ReplOp = dyn_cast<BinaryOperator>(Repl);
- if (Op && ReplOp && isa<OverflowingBinaryOperator>(Op) &&
- isa<OverflowingBinaryOperator>(ReplOp)) {
- if (ReplOp->hasNoSignedWrap() && !Op->hasNoSignedWrap())
- ReplOp->setHasNoSignedWrap(false);
- if (ReplOp->hasNoUnsignedWrap() && !Op->hasNoUnsignedWrap())
- ReplOp->setHasNoUnsignedWrap(false);
- }
+ if (Op && ReplOp)
+ ReplOp->andIRFlags(Op);
+
if (Instruction *ReplInst = dyn_cast<Instruction>(Repl)) {
// FIXME: If both the original and replacement value are part of the
// same control-flow region (meaning that the execution of one
diff --git a/llvm/test/Transforms/GVN/pr12979.ll b/llvm/test/Transforms/GVN/pr12979.ll
index 0198a56513e..919c22de02a 100644
--- a/llvm/test/Transforms/GVN/pr12979.ll
+++ b/llvm/test/Transforms/GVN/pr12979.ll
@@ -77,3 +77,17 @@ define i32 @test7(i32 %x, i32 %y) {
%foo = add i32 %add1, %add2
ret i32 %foo
}
+
+declare void @mumble(i2, i2)
+
+define void @test8(i2 %x) {
+; CHECK-LABEL: @test8(
+; CHECK: %[[ashr:.*]] = ashr i2 %x, 1
+; CHECK-NEXT: call void @mumble(i2 %[[ashr]], i2 %[[ashr]])
+; CHECK-NEXT: ret void
+
+ %ashr0 = ashr exact i2 %x, 1
+ %ashr1 = ashr i2 %x, 1
+ call void @mumble(i2 %ashr0, i2 %ashr1)
+ ret void
+}
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