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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-07-31 14:15:16 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-07-31 14:15:16 +0000 |
commit | 638a202760e222f7a8ac80ec2e4fb0412b46a3c7 (patch) | |
tree | b48dbfc42a52f496f1d68bd9ba762b6ed23867a8 | |
parent | c0c3a6ed5e3b8a8ae031ee0beb89ee488a57d080 (diff) | |
download | bcm5719-llvm-638a202760e222f7a8ac80ec2e4fb0412b46a3c7.tar.gz bcm5719-llvm-638a202760e222f7a8ac80ec2e4fb0412b46a3c7.zip |
AMDGPU: Don't handle FP16_TO_FP in isCanonicalized
This needs more special handling to do correctly.
Fixes test in subsequent commit.
llvm-svn: 338381
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index acde638a006..64d63e43855 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -6800,10 +6800,6 @@ static bool isCanonicalized(SelectionDAG &DAG, SDValue Op, return Op.getOperand(0).getValueType().getScalarType() != MVT::f16 || ST->hasFP16Denormals(); - case ISD::FP16_TO_FP: - case ISD::FP_TO_FP16: - return ST->hasFP16Denormals(); - // It can/will be lowered or combined as a bit operation. // Need to check their input recursively to handle. case ISD::FNEG: |