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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-01 07:38:21 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-01 07:38:21 +0000 |
| commit | 616a8e42b1b2054225cd905a4fdb193e7d396da7 (patch) | |
| tree | c909904d30f1bdf784db031ed70e617305884837 | |
| parent | b635d0458933d56c5cbbdaf2eac323fb571c0cd9 (diff) | |
| download | bcm5719-llvm-616a8e42b1b2054225cd905a4fdb193e7d396da7.tar.gz bcm5719-llvm-616a8e42b1b2054225cd905a4fdb193e7d396da7.zip | |
R600: Set all float vector expands in the same place
llvm-svn: 209988
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index 6c443ea828b..7b6df9ac407 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -204,9 +204,6 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); - setOperationAction(ISD::FNEG, MVT::v2f32, Expand); - setOperationAction(ISD::FNEG, MVT::v4f32, Expand); - setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); setOperationAction(ISD::MUL, MVT::i64, Expand); @@ -216,8 +213,6 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setOperationAction(ISD::UDIVREM, MVT::i32, Custom); setOperationAction(ISD::UDIVREM, MVT::i64, Custom); setOperationAction(ISD::UREM, MVT::i32, Expand); - setOperationAction(ISD::VSELECT, MVT::v2f32, Expand); - setOperationAction(ISD::VSELECT, MVT::v4f32, Expand); static const MVT::SimpleValueType IntTypes[] = { MVT::v2i32, MVT::v4i32 @@ -261,7 +256,9 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setOperationAction(ISD::FSQRT, VT, Expand); setOperationAction(ISD::FSIN, VT, Expand); setOperationAction(ISD::FSUB, VT, Expand); + setOperationAction(ISD::FNEG, VT, Expand); setOperationAction(ISD::SELECT, VT, Expand); + setOperationAction(ISD::VSELECT, VT, Expand); } setTargetDAGCombine(ISD::MUL); |
