diff options
| author | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-08-09 20:17:37 +0000 |
|---|---|---|
| committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-08-09 20:17:37 +0000 |
| commit | 6063983c30cb1b789adb7957b5dd5e17d1f5e4d6 (patch) | |
| tree | c39d0db858e82bcf9a294450f4bd6fa5962a0f9b | |
| parent | efb6eb26972e083c3cd4afc7d8ca1b902abacced (diff) | |
| download | bcm5719-llvm-6063983c30cb1b789adb7957b5dd5e17d1f5e4d6.tar.gz bcm5719-llvm-6063983c30cb1b789adb7957b5dd5e17d1f5e4d6.zip | |
builtins: correct __umodsi3, __udivsi3 on ARM
When building the builtins for a modern CPU (idiv support), __umodsi3 was
completely incorrect as it would behave as __udivmosi3, which takes a tertiary
parameter which is a pointer.
__udivsi3 was also incorrect, returning the remainder in r1. Although this
would not result in any crash or invalid behaviour as r1 is a caller saved
register in AAPCS, this is unnecessary. Simply perform the division ignoring
the remainder.
llvm-svn: 215295
| -rw-r--r-- | compiler-rt/lib/builtins/arm/udivsi3.S | 4 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/umodsi3.S | 6 |
2 files changed, 3 insertions, 7 deletions
diff --git a/compiler-rt/lib/builtins/arm/udivsi3.S b/compiler-rt/lib/builtins/arm/udivsi3.S index bb5f8a069f4..34bd713fb1f 100644 --- a/compiler-rt/lib/builtins/arm/udivsi3.S +++ b/compiler-rt/lib/builtins/arm/udivsi3.S @@ -27,9 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__udivsi3) #if __ARM_ARCH_EXT_IDIV__ tst r1, r1 beq LOCAL_LABEL(divby0) - mov r3, r0 - udiv r0, r3, r1 - mls r1, r0, r1, r3 + udiv r0, r0, r1 bx lr #else cmp r1, #1 diff --git a/compiler-rt/lib/builtins/arm/umodsi3.S b/compiler-rt/lib/builtins/arm/umodsi3.S index eb1f441b580..b0c62d73cd8 100644 --- a/compiler-rt/lib/builtins/arm/umodsi3.S +++ b/compiler-rt/lib/builtins/arm/umodsi3.S @@ -25,10 +25,8 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3) #if __ARM_ARCH_EXT_IDIV__ tst r1, r1 beq LOCAL_LABEL(divby0) - mov r3, r0 - udiv r0, r3, r1 - mls r1, r0, r1, r3 - str r1, [r2] + udiv r2, r0, r1 + mls r0, r2, r1, r0 bx lr #else cmp r1, #1 |
