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author | Owen Anderson <resistor@mac.com> | 2008-08-27 22:30:02 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2008-08-27 22:30:02 +0000 |
commit | 5f57bc224775c5f6191226c12953e1a3a16bbdd9 (patch) | |
tree | 19f391447cfa555fb8e4586f4cef92d5f940db33 | |
parent | 76105a4a4fe80d29c4cf47e25c4098599a7812dc (diff) | |
download | bcm5719-llvm-5f57bc224775c5f6191226c12953e1a3a16bbdd9.tar.gz bcm5719-llvm-5f57bc224775c5f6191226c12953e1a3a16bbdd9.zip |
Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel.
llvm-svn: 55439
-rw-r--r-- | llvm/include/llvm/CodeGen/FastISel.h | 5 | ||||
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 11 |
2 files changed, 16 insertions, 0 deletions
diff --git a/llvm/include/llvm/CodeGen/FastISel.h b/llvm/include/llvm/CodeGen/FastISel.h index f28739448df..fcd970b8404 100644 --- a/llvm/include/llvm/CodeGen/FastISel.h +++ b/llvm/include/llvm/CodeGen/FastISel.h @@ -193,6 +193,11 @@ protected: const TargetRegisterClass *RC, uint64_t Imm); + /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg + /// from a specified index of a superregister. + unsigned FastEmitInst_extractsubreg(const TargetRegisterClass *RC, + unsigned Op0, uint32_t Idx); + private: unsigned getRegForValue(Value *V, DenseMap<const Value*, unsigned> &ValueMap); diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index 82eee56cd2b..2dd228249b3 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -586,3 +586,14 @@ unsigned FastISel::FastEmitInst_i(unsigned MachineInstOpcode, BuildMI(MBB, II, ResultReg).addImm(Imm); return ResultReg; } + +unsigned FastISel::FastEmitInst_extractsubreg(const TargetRegisterClass *RC, + unsigned Op0, uint32_t Idx) { + const TargetRegisterClass* SRC = *(RC->subregclasses_begin()+Idx-1); + + unsigned ResultReg = createResultReg(SRC); + const TargetInstrDesc &II = TII.get(TargetInstrInfo::EXTRACT_SUBREG); + + BuildMI(MBB, II, ResultReg).addReg(Op0); + return ResultReg; +} |