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| author | Lei Huang <lei@ca.ibm.com> | 2018-06-25 19:28:27 +0000 |
|---|---|---|
| committer | Lei Huang <lei@ca.ibm.com> | 2018-06-25 19:28:27 +0000 |
| commit | 5d109ee3d4a9004b7717d376f31674122c926e4f (patch) | |
| tree | 77d8d4928a3630b0017442e85127db3dd96d2782 | |
| parent | 5947c17fd4225fdf6d655fca0830f6c6f8337d0b (diff) | |
| download | bcm5719-llvm-5d109ee3d4a9004b7717d376f31674122c926e4f.tar.gz bcm5719-llvm-5d109ee3d4a9004b7717d376f31674122c926e4f.zip | |
[PowerPC] Fix incorrectly encoded wait instruction
Encoding for the wait instruction was wrong. Fix according to ISA 3.0.
Differential Revision: https://reviews.llvm.org/D48550
llvm-svn: 335514
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt | 8 | ||||
| -rw-r--r-- | llvm/test/MC/PowerPC/ppc64-encoding-bookII.s | 16 |
3 files changed, 13 insertions, 13 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index ece17a77625..f80c10905ca 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -3807,7 +3807,7 @@ def ICBI : XForm_1a<31, 982, (outs), (ins memrr:$src), def EnforceIEIO : XForm_24_eieio<31, 854, (outs), (ins), "eieio", IIC_LdStLoad, []>; -def WAIT : XForm_24_sync<31, 62, (outs), (ins i32imm:$L), +def WAIT : XForm_24_sync<31, 30, (outs), (ins i32imm:$L), "wait $L", IIC_LdStLoad, []>; def MBAR : XForm_mbar<31, 854, (outs), (ins u5imm:$MO), diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt index b4863835a0e..08ac70e41c8 100644 --- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt +++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt @@ -46,7 +46,7 @@ 0x7c 0x00 0x06 0xac # CHECK: waitimpl -0x7c 0x40 0x00 0x7c +0x7c 0x40 0x00 0x3c # CHECK: mbar 1 0x7c 0x20 0x06 0xac @@ -103,13 +103,13 @@ 0x7c 0x40 0x04 0xac # CHECK: wait -0x7c 0x00 0x00 0x7c +0x7c 0x00 0x00 0x3c # CHECK: waitrsv -0x7c 0x20 0x00 0x7c +0x7c 0x20 0x00 0x3c # CHECK: waitimpl -0x7c 0x40 0x00 0x7c +0x7c 0x40 0x00 0x3c # CHECK: mftb 2, 123 0x7c 0x5b 0x1a 0xe6 diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s b/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s index a6af0a954d7..70b635ed2c2 100644 --- a/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s +++ b/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s @@ -97,8 +97,8 @@ # CHECK-BE: eieio # encoding: [0x7c,0x00,0x06,0xac] # CHECK-LE: eieio # encoding: [0xac,0x06,0x00,0x7c] eieio -# CHECK-BE: waitimpl # encoding: [0x7c,0x40,0x00,0x7c] -# CHECK-LE: waitimpl # encoding: [0x7c,0x00,0x40,0x7c] +# CHECK-BE: waitimpl # encoding: [0x7c,0x40,0x00,0x3c] +# CHECK-LE: waitimpl # encoding: [0x3c,0x00,0x40,0x7c] wait 2 # CHECK-BE: mbar 1 # encoding: [0x7c,0x20,0x06,0xac] # CHECK-LE: mbar 1 # encoding: [0xac,0x06,0x20,0x7c] @@ -171,14 +171,14 @@ # CHECK-LE: ptesync # encoding: [0xac,0x04,0x40,0x7c] ptesync -# CHECK-BE: wait # encoding: [0x7c,0x00,0x00,0x7c] -# CHECK-LE: wait # encoding: [0x7c,0x00,0x00,0x7c] +# CHECK-BE: wait # encoding: [0x7c,0x00,0x00,0x3c] +# CHECK-LE: wait # encoding: [0x3c,0x00,0x00,0x7c] wait -# CHECK-BE: waitrsv # encoding: [0x7c,0x20,0x00,0x7c] -# CHECK-LE: waitrsv # encoding: [0x7c,0x00,0x20,0x7c] +# CHECK-BE: waitrsv # encoding: [0x7c,0x20,0x00,0x3c] +# CHECK-LE: waitrsv # encoding: [0x3c,0x00,0x20,0x7c] waitrsv -# CHECK-BE: waitimpl # encoding: [0x7c,0x40,0x00,0x7c] -# CHECK-LE: waitimpl # encoding: [0x7c,0x00,0x40,0x7c] +# CHECK-BE: waitimpl # encoding: [0x7c,0x40,0x00,0x3c] +# CHECK-LE: waitimpl # encoding: [0x3c,0x00,0x40,0x7c] waitimpl # Time base instructions |
