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authorGeorge Rimar <grimar@accesssoftek.com>2016-04-14 17:05:56 +0000
committerGeorge Rimar <grimar@accesssoftek.com>2016-04-14 17:05:56 +0000
commit5cfd306e00ddd88bbd5e50a305b7437e3ba92584 (patch)
tree53cc3a690c7a8fd22c915a9529da6337d2124b4a
parentcdf1529c010d28a9102f770727cbdc2f74768de2 (diff)
downloadbcm5719-llvm-5cfd306e00ddd88bbd5e50a305b7437e3ba92584.tar.gz
bcm5719-llvm-5cfd306e00ddd88bbd5e50a305b7437e3ba92584.zip
Move variables closer to code scopes that uses them. NFC.
llvm-svn: 266340
-rw-r--r--lld/ELF/Writer.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lld/ELF/Writer.cpp b/lld/ELF/Writer.cpp
index 0efc57102b6..6bb13912499 100644
--- a/lld/ELF/Writer.cpp
+++ b/lld/ELF/Writer.cpp
@@ -462,8 +462,6 @@ void Writer<ELFT>::scanRelocs(InputSectionBase<ELFT> &C, ArrayRef<RelTy> Rels) {
if (auto *S = dyn_cast<SharedSymbol<ELFT>>(&Body))
S->File->IsUsed = true;
- RelExpr Expr = Target->getRelExpr(Type, Body);
-
uintX_t Addend = getAddend<ELFT>(RI);
const uint8_t *BufLoc = Buf + RI.r_offset;
if (!RelTy::IsRela)
@@ -471,7 +469,7 @@ void Writer<ELFT>::scanRelocs(InputSectionBase<ELFT> &C, ArrayRef<RelTy> Rels) {
if (Config->EMachine == EM_MIPS)
Addend += findMipsPairedAddend<ELFT>(Buf, BufLoc, Body, &RI, E);
- bool Preemptible = Body.isPreemptible();
+ RelExpr Expr = Target->getRelExpr(Type, Body);
if (unsigned Processed =
handleTlsRelocation<ELFT>(Type, Body, C, Offset, Addend, Expr)) {
I += (Processed - 1);
@@ -494,6 +492,8 @@ void Writer<ELFT>::scanRelocs(InputSectionBase<ELFT> &C, ArrayRef<RelTy> Rels) {
}
}
+ bool Preemptible = Body.isPreemptible();
+
// If a relocation needs PLT, we create a PLT and a GOT slot
// for the symbol.
TargetInfo::PltNeed NeedPlt = Target->needsPlt(Type, Body);
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