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| author | Mircea Trofin <mtrofin@google.com> | 2019-05-10 00:12:51 +0000 | 
|---|---|---|
| committer | Mircea Trofin <mtrofin@google.com> | 2019-05-10 00:12:51 +0000 | 
| commit | 5c31c05fbde371e03c057080a05eeb18dda4c4ff (patch) | |
| tree | 8af51d628bf7077692d26c9dba6c314317bcee7f | |
| parent | 64196850f0e9b31d1c3bbfcb52ab76d9901f42ef (diff) | |
| download | bcm5719-llvm-5c31c05fbde371e03c057080a05eeb18dda4c4ff.tar.gz bcm5719-llvm-5c31c05fbde371e03c057080a05eeb18dda4c4ff.zip  | |
[llvm] X86DiscriminateMemOps: insert debug info when missing
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: aprantl, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61735
llvm-svn: 360396
| -rw-r--r-- | llvm/lib/Target/X86/X86DiscriminateMemOps.cpp | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/discriminate-mem-ops-missing-info.ll | 55 | 
2 files changed, 58 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86DiscriminateMemOps.cpp b/llvm/lib/Target/X86/X86DiscriminateMemOps.cpp index 22271896f6c..7589dca4892 100644 --- a/llvm/lib/Target/X86/X86DiscriminateMemOps.cpp +++ b/llvm/lib/Target/X86/X86DiscriminateMemOps.cpp @@ -115,14 +115,15 @@ bool X86DiscriminateMemOps::runOnMachineFunction(MachineFunction &MF) {        if (X86II::getMemoryOperandNo(MI.getDesc().TSFlags) < 0)          continue;        const DILocation *DI = MI.getDebugLoc(); -      if (!DI) { +      bool HasDebug = DI; +      if (!HasDebug) {          DI = ReferenceDI;        }        Location L = diToLocation(DI);        DenseSet<unsigned> &Set = Seen[L];        const std::pair<DenseSet<unsigned>::iterator, bool> TryInsert =            Set.insert(DI->getBaseDiscriminator()); -      if (!TryInsert.second) { +      if (!TryInsert.second || !HasDebug) {          unsigned BF, DF, CI = 0;          DILocation::decodeDiscriminator(DI->getDiscriminator(), BF, DF, CI);          Optional<unsigned> EncodedDiscriminator = DILocation::encodeDiscriminator( diff --git a/llvm/test/CodeGen/X86/discriminate-mem-ops-missing-info.ll b/llvm/test/CodeGen/X86/discriminate-mem-ops-missing-info.ll new file mode 100644 index 00000000000..9ddf62dfe09 --- /dev/null +++ b/llvm/test/CodeGen/X86/discriminate-mem-ops-missing-info.ll @@ -0,0 +1,55 @@ +; RUN: llc -x86-discriminate-memops  < %s | FileCheck %s +; +; original source, compiled with -O3 -gmlt -fdebug-info-for-profiling: +; int sum(int* arr, int pos1, int pos2) { +;   return arr[pos1] + arr[pos2]; +; } +; +; ModuleID = 'test.cc' +source_filename = "test.cc" +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +declare void @llvm.prefetch(i8 *, i32, i32, i32) +; Function Attrs: norecurse nounwind readonly uwtable +define i32 @sum(i32* %arr, i32 %pos1, i32 %pos2) !dbg !7 { +entry: +  %idxprom = sext i32 %pos1 to i64 +  %arrayidx = getelementptr inbounds i32, i32* %arr, i64 %idxprom +  %0 = load i32, i32* %arrayidx, align 4 +  %idxprom1 = sext i32 %pos2 to i64 +  %arrayidx2 = getelementptr inbounds i32, i32* %arr, i64 %idxprom1 +  %1 = load i32, i32* %arrayidx2, align 4 +  %add = add nsw i32 %1, %0, !dbg !15 +  ret i32 %add +} + +attributes #0 = { "target-cpu"="x86-64" } + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!3, !4, !5} +!llvm.ident = !{!6} + +!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly, enums: !2, debugInfoForProfiling: true) +!1 = !DIFile(filename: "test.cc", directory: "/tmp") +!2 = !{} +!3 = !{i32 2, !"Dwarf Version", i32 4} +!4 = !{i32 2, !"Debug Info Version", i32 3} +!5 = !{i32 1, !"wchar_size", i32 4} +!6 = !{!"clang version 7.0.0 (trunk 322155) (llvm/trunk 322159)"} +!7 = distinct !DISubprogram(name: "sum", linkageName: "sum", scope: !1, file: !1, line: 1, type: !8, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: true, unit: !0) +!8 = !DISubroutineType(types: !2) +!9 = !DILocation(line: 2, column: 10, scope: !7) +!10 = !{!11, !11, i64 0} +!11 = !{!"int", !12, i64 0} +!12 = !{!"omnipotent char", !13, i64 0} +!13 = !{!"Simple C++ TBAA"} +!15 = !DILocation(line: 2, column: 20, scope: !7) + + +;CHECK-LABEL: sum: +;CHECK:       # %bb.0: +;CHECK:       .loc 1 1 0 {{.*}} discriminator 2 +;CHECK-NEXT:  movl (%rdi,%rax,4), %eax +;CHECK-NEXT:  .loc 1 2 20 +;CHECK-NEXT:  addl (%rdi,%rcx,4), %eax  | 

