Fix reliance on -flax-vector-conversions in AVX intrinsics headers and

corresponding tests.

llvm-svn: 372063

4 files changed, 16 insertions, 16 deletions

diff --git a/clang/lib/Headers/avx512fintrin.h b/clang/lib/Headers/avx512fintrin.h
index 4e341a10fa9..698e477fe5f 100644
--- a/clang/lib/Headers/avx512fintrin.h
+++ b/clang/lib/Headers/avx512fintrin.h
@@ -7658,13 +7658,13 @@ _mm512_maskz_getexp_ps (__mmask16 __U, __m512 __A)
 #define _mm512_i32gather_ps(index, addr, scale) \
   (__m512)__builtin_ia32_gathersiv16sf((__v16sf)_mm512_undefined_ps(), \
                                        (void const *)(addr), \
-                                       (__v16sf)(__m512)(index), \
+                                       (__v16si)(__m512)(index), \
                                        (__mmask16)-1, (int)(scale))
 
 #define _mm512_mask_i32gather_ps(v1_old, mask, index, addr, scale) \
   (__m512)__builtin_ia32_gathersiv16sf((__v16sf)(__m512)(v1_old), \
                                        (void const *)(addr), \
-                                       (__v16sf)(__m512)(index), \
+                                       (__v16si)(__m512)(index), \
                                        (__mmask16)(mask), (int)(scale))
 
 #define _mm512_i32gather_epi32(index, addr, scale) \
diff --git a/clang/test/CodeGen/avx-builtins.c b/clang/test/CodeGen/avx-builtins.c
index 0a09c53391e..b31a234db2e 100644
--- a/clang/test/CodeGen/avx-builtins.c
+++ b/clang/test/CodeGen/avx-builtins.c
@@ -1,6 +1,6 @@
-// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - -Wall -Werror | FileCheck %s
-// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s
-// RUN: %clang_cc1 -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx -emit-llvm -o - -Wall -Werror | FileCheck %s
 
 
 #include <immintrin.h>
@@ -105,7 +105,7 @@ __m256d test_mm256_broadcast_sd(double* A) {
   return _mm256_broadcast_sd(A);
 }
 
-__m128d test_mm_broadcast_ss(float* A) {
+__m128 test_mm_broadcast_ss(float* A) {
   // CHECK-LABEL: test_mm_broadcast_ss
   // CHECK: load float, float* %{{.*}}
   // CHECK: insertelement <4 x float> undef, float %{{.*}}, i32 0
@@ -115,7 +115,7 @@ __m128d test_mm_broadcast_ss(float* A) {
   return _mm_broadcast_ss(A);
 }
 
-__m256d test_mm256_broadcast_ss(float* A) {
+__m256 test_mm256_broadcast_ss(float* A) {
   // CHECK-LABEL: test_mm256_broadcast_ss
   // CHECK: load float, float* %{{.*}}
   // CHECK: insertelement <8 x float> undef, float %{{.*}}, i32 0
@@ -1278,7 +1278,7 @@ __m128 test_mm_maskload_ps(float* A, __m128i B) {
   return _mm_maskload_ps(A, B);
 }
 
-__m256d test_mm256_maskload_ps(float* A, __m256i B) {
+__m256 test_mm256_maskload_ps(float* A, __m256i B) {
   // CHECK-LABEL: test_mm256_maskload_ps
   // CHECK: call <8 x float> @llvm.x86.avx.maskload.ps.256(i8* %{{.*}}, <8 x i32> %{{.*}})
   return _mm256_maskload_ps(A, B);
diff --git a/clang/test/CodeGen/avx-cmp-builtins.c b/clang/test/CodeGen/avx-cmp-builtins.c
index 609f5964f31..adb8a86112c 100644
--- a/clang/test/CodeGen/avx-cmp-builtins.c
+++ b/clang/test/CodeGen/avx-cmp-builtins.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -ffreestanding %s -O3 -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -O3 -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - | FileCheck %s
 // FIXME: The shufflevector instructions in test_cmpgt_sd are relying on O3 here.
 
 
@@ -14,7 +14,7 @@ __m128d test_cmp_sd(__m128d a, __m128d b) {
   return _mm_cmp_sd(a, b, _CMP_GE_OS);
 }
 
-__m128d test_cmp_ss(__m128 a, __m128 b) {
+__m128 test_cmp_ss(__m128 a, __m128 b) {
   // Expects that the third argument in LLVM IR is immediate expression
   // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 13)
   return _mm_cmp_ss(a, b, _CMP_GE_OS);
diff --git a/clang/test/CodeGen/avx512f-builtins.c b/clang/test/CodeGen/avx512f-builtins.c
index 2a083e3e5c6..73a093c5468 100644
--- a/clang/test/CodeGen/avx512f-builtins.c
+++ b/clang/test/CodeGen/avx512f-builtins.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -fexperimental-new-pass-manager -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror | FileCheck %s
-// RUN: %clang_cc1 -fexperimental-new-pass-manager -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -fexperimental-new-pass-manager -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -fexperimental-new-pass-manager -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror | FileCheck %s
 
 #include <immintrin.h>
 
@@ -9468,7 +9468,7 @@ __m256 test_mm512_mask_cvtpd_ps (__m256 __W, __mmask8 __U, __m512d __A)
   return _mm512_mask_cvtpd_ps (__W,__U,__A);
 }
 
-__m512d test_mm512_cvtpd_pslo(__m512 __A) 
+__m512 test_mm512_cvtpd_pslo(__m512d __A)
 {
   // CHECK-LABEL: @test_mm512_cvtpd_pslo
   // CHECK: @llvm.x86.avx512.mask.cvtpd2ps.512
@@ -9477,7 +9477,7 @@ __m512d test_mm512_cvtpd_pslo(__m512 __A)
   return _mm512_cvtpd_pslo(__A);
 }
 
-__m512d test_mm512_mask_cvtpd_pslo(__m512 __W, __mmask8 __U, __m512d __A) {
+__m512 test_mm512_mask_cvtpd_pslo(__m512 __W, __mmask8 __U, __m512d __A) {
   // CHECK-LABEL: @test_mm512_mask_cvtpd_pslo
   // CHECK: @llvm.x86.avx512.mask.cvtpd2ps.512
   // CHECK: zeroinitializer
@@ -10659,7 +10659,7 @@ __m512i test_mm512_setzero_epi32()
   return _mm512_setzero_epi32();
 }
 
-__m512i test_mm512_setzero()
+__m512 test_mm512_setzero()
 {
   // CHECK-LABEL: @test_mm512_setzero
   // CHECK: zeroinitializer
@@ -10673,7 +10673,7 @@ __m512i test_mm512_setzero_si512()
   return _mm512_setzero_si512();
 }
 
-__m512i test_mm512_setzero_ps()
+__m512 test_mm512_setzero_ps()
 {
   // CHECK-LABEL: @test_mm512_setzero_ps
   // CHECK: zeroinitializer