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| author | Simon Atanasyan <satanasyan@mips.com> | 2012-08-29 15:17:29 +0000 |
|---|---|---|
| committer | Simon Atanasyan <satanasyan@mips.com> | 2012-08-29 15:17:29 +0000 |
| commit | 5a0642fdc1bf997d8562ccc0c6887af30a903904 (patch) | |
| tree | fc719f0389bfa3b73ea4ad75f016e6f58b31f0db | |
| parent | 5a9b616d6b8eec9b8acb0622c4c43124ae6cb71c (diff) | |
| download | bcm5719-llvm-5a0642fdc1bf997d8562ccc0c6887af30a903904.tar.gz bcm5719-llvm-5a0642fdc1bf997d8562ccc0c6887af30a903904.zip | |
Define _MIPS_ARCH and _MIPS_ARCH_<cpu name> macros for MIPS targets.
The patch suggested by Logan Chien.
llvm-svn: 162840
| -rw-r--r-- | clang/lib/Basic/Targets.cpp | 3 | ||||
| -rw-r--r-- | clang/test/Preprocessor/init.c | 8 |
2 files changed, 11 insertions, 0 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 1d495f1f641..b5cc54d44f6 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -3736,6 +3736,9 @@ public: Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); + + Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\""); + Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper()); } virtual void getTargetDefines(const LangOptions &Opts, diff --git a/clang/test/Preprocessor/init.c b/clang/test/Preprocessor/init.c index e7321e06309..66b91aad10b 100644 --- a/clang/test/Preprocessor/init.c +++ b/clang/test/Preprocessor/init.c @@ -461,6 +461,8 @@ // MIPS32BE:#define _ABIO32 1 // MIPS32BE-NOT:#define _LP64 // MIPS32BE:#define _MIPSEB 1 +// MIPS32BE:#define _MIPS_ARCH "mips32" +// MIPS32BE:#define _MIPS_ARCH_MIPS32 1 // MIPS32BE:#define _MIPS_SIM _ABIO32 // MIPS32BE:#define _MIPS_SZINT 32 // MIPS32BE:#define _MIPS_SZLONG 32 @@ -575,6 +577,8 @@ // MIPS32EL:#define _ABIO32 1 // MIPS32EL-NOT:#define _LP64 // MIPS32EL:#define _MIPSEL 1 +// MIPS32EL:#define _MIPS_ARCH "mips32" +// MIPS32EL:#define _MIPS_ARCH_MIPS32 1 // MIPS32EL:#define _MIPS_SIM _ABIO32 // MIPS32EL:#define _MIPS_SZINT 32 // MIPS32EL:#define _MIPS_SZLONG 32 @@ -686,6 +690,8 @@ // MIPS64BE:#define _ABI64 3 // MIPS64BE:#define _LP64 1 // MIPS64BE:#define _MIPSEB 1 +// MIPS64BE:#define _MIPS_ARCH "mips64" +// MIPS64BE:#define _MIPS_ARCH_MIPS64 1 // MIPS64BE:#define _MIPS_SIM _ABI64 // MIPS64BE:#define _MIPS_SZINT 32 // MIPS64BE:#define _MIPS_SZLONG 64 @@ -797,6 +803,8 @@ // MIPS64EL:#define _ABI64 3 // MIPS64EL:#define _LP64 1 // MIPS64EL:#define _MIPSEL 1 +// MIPS64EL:#define _MIPS_ARCH "mips64" +// MIPS64EL:#define _MIPS_ARCH_MIPS64 1 // MIPS64EL:#define _MIPS_SIM _ABI64 // MIPS64EL:#define _MIPS_SZINT 32 // MIPS64EL:#define _MIPS_SZLONG 64 |
