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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-06-26 17:09:29 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-06-26 17:09:29 +0000
commit59a0d3243b98189f218de6ae9a0f1e7c6a1390c7 (patch)
tree7506c8f7b7fde59b9a337ac7ef07785695dead5b
parent773d6ae5096c455837c37651d1b886295f3e5e38 (diff)
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Allow targets to inject passes before the virtual register rewriter.
Such passes can be used to tweak the register assignments in a target-dependent way, for example to avoid write-after-write dependencies. llvm-svn: 159209
-rw-r--r--llvm/include/llvm/CodeGen/Passes.h12
-rw-r--r--llvm/lib/CodeGen/Passes.cpp6
2 files changed, 17 insertions, 1 deletions
diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h
index cc3b3d72356..206bc2e1236 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -175,6 +175,18 @@ protected:
/// LLVMTargetMachine provides standard regalloc passes for most targets.
virtual void addOptimizedRegAlloc(FunctionPass *RegAllocPass);
+ /// addPreRewrite - Add passes to the optimized register allocation pipeline
+ /// after register allocation is complete, but before virtual registers are
+ /// rewritten to physical registers.
+ ///
+ /// These passes must preserve VirtRegMap and LiveIntervals, and when running
+ /// after RABasic or RAGreedy, they should take advantage of LiveRegMatrix.
+ /// When these passes run, VirtRegMap contains legal physreg assignments for
+ /// all virtual registers.
+ virtual bool addPreRewrite() {
+ return false;
+ }
+
/// addFinalizeRegAlloc - This method may be implemented by targets that want
/// to run passes within the regalloc pipeline, immediately after the register
/// allocation pass itself. These passes run as soon as virtual regisiters
diff --git a/llvm/lib/CodeGen/Passes.cpp b/llvm/lib/CodeGen/Passes.cpp
index b166dbe7432..bf244a55456 100644
--- a/llvm/lib/CodeGen/Passes.cpp
+++ b/llvm/lib/CodeGen/Passes.cpp
@@ -603,7 +603,11 @@ void TargetPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
// Add the selected register allocation pass.
PM->add(RegAllocPass);
- printAndVerify("After Register Allocation");
+ printAndVerify("After Register Allocation, before rewriter");
+
+ // Allow targets to change the register assignments before rewriting.
+ if (addPreRewrite())
+ printAndVerify("After pre-rewrite passes");
// Finally rewrite virtual registers.
addPass(VirtRegRewriterID);
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