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authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-08-10 21:16:16 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-08-10 21:16:16 +0000
commit57f3db6e2e419628bed1ed6cfee08ac4a517d0f6 (patch)
treead4024be0e9acc9570a22e359c90607630747cdb
parent6fdc171414f1fe9865f5e25756af9b2156719862 (diff)
downloadbcm5719-llvm-57f3db6e2e419628bed1ed6cfee08ac4a517d0f6.tar.gz
bcm5719-llvm-57f3db6e2e419628bed1ed6cfee08ac4a517d0f6.zip
Give up on register class recalculation when the register is used with subreg
operands. We don't currently have a hook to provide "the largest super class of A where all registers' getSubReg(subidx) is valid and in B". llvm-svn: 110730
-rw-r--r--llvm/lib/CodeGen/CalcSpillWeights.cpp11
1 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/CalcSpillWeights.cpp b/llvm/lib/CodeGen/CalcSpillWeights.cpp
index a39503ba2ee..8ecce4a3fbe 100644
--- a/llvm/lib/CodeGen/CalcSpillWeights.cpp
+++ b/llvm/lib/CodeGen/CalcSpillWeights.cpp
@@ -181,10 +181,19 @@ void VirtRegAuxInfo::CalculateRegClass(unsigned reg) {
SmallPtrSet<const TargetRegisterClass*,8> rcs;
for (MachineRegisterInfo::reg_nodbg_iterator I = mri.reg_nodbg_begin(reg),
- E = mri.reg_nodbg_end(); I != E; ++I)
+ E = mri.reg_nodbg_end(); I != E; ++I) {
+ // The targets don't have accurate enough regclass descriptions that we can
+ // handle subregs. We need something similar to
+ // TRI::getMatchingSuperRegClass, but returning a super class instead of a
+ // sub class.
+ if (I.getOperand().getSubReg()) {
+ DEBUG(dbgs() << "Cannot handle subregs: " << I.getOperand() << '\n');
+ return;
+ }
if (const TargetRegisterClass *rc =
I->getDesc().getRegClass(I.getOperandNo(), tri))
rcs.insert(rc);
+ }
// If we found no regclass constraints, just leave reg as is.
// In theory, we could inflate to the largest superclass of reg's existing
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