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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-08-11 02:49:41 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-08-11 02:49:41 +0000
commit572c9aaf537b5600e37ea65aee593cf540de1809 (patch)
treedad67c6fe6e265c3aa5ed24344e16611063e9346
parentaa149cbd863d1722f8e5263cac26b9c9f4461f57 (diff)
downloadbcm5719-llvm-572c9aaf537b5600e37ea65aee593cf540de1809.tar.gz
bcm5719-llvm-572c9aaf537b5600e37ea65aee593cf540de1809.zip
Use the splat index to generate the desired shuffle. Otherwise we
could only get undefs and the vector shuffle becomes an undef, generating wrong code. llvm-svn: 137295
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp8
-rw-r--r--llvm/test/CodeGen/X86/avx-splat.ll10
2 files changed, 14 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 217a7bcf530..ae573284d7d 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4125,15 +4125,15 @@ static SDValue PromoteVectorToScalarSplat(ShuffleVectorSDNode *SV,
int NumElems = SrcVT.getVectorNumElements();
assert(SrcVT.is256BitVector() && "unknown howto handle vector type");
+ assert(SV->isSplat() && "shuffle must be a splat");
- SmallVector<int, 4> Mask;
- for (int i = 0; i < NumElems/2; ++i)
- Mask.push_back(SV->getMaskElt(i));
+ int SplatIdx = SV->getSplatIndex();
+ const int Mask[4] = { SplatIdx, SplatIdx, SplatIdx, SplatIdx };
EVT SVT = EVT::getVectorVT(*DAG.getContext(), SrcVT.getVectorElementType(),
NumElems/2);
SDValue SV1 = DAG.getVectorShuffle(SVT, dl, V1.getOperand(1),
- DAG.getUNDEF(SVT), &Mask[0]);
+ DAG.getUNDEF(SVT), Mask);
SDValue InsV = Insert128BitVector(DAG.getUNDEF(SrcVT), SV1,
DAG.getConstant(0, MVT::i32), DAG, dl);
diff --git a/llvm/test/CodeGen/X86/avx-splat.ll b/llvm/test/CodeGen/X86/avx-splat.ll
index 36d469417f9..243ab9ba318 100644
--- a/llvm/test/CodeGen/X86/avx-splat.ll
+++ b/llvm/test/CodeGen/X86/avx-splat.ll
@@ -77,3 +77,13 @@ __load_and_broadcast_32.exit1249: ; preds = %load.i1247, %for_ex
ret void
}
+; CHECK: vpshufd $0
+; CHECK-NEXT: vinsertf128 $1
+define <8 x float> @funcF(i32* %ptr) nounwind {
+ %val = load i32* %ptr, align 4
+ %ret6 = insertelement <8 x i32> undef, i32 %val, i32 6
+ %ret7 = insertelement <8 x i32> %ret6, i32 %val, i32 7
+ %tmp = bitcast <8 x i32> %ret7 to <8 x float>
+ ret <8 x float> %tmp
+}
+
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