Revert "GlobalISel: move vector extract/insert inside generic opcode region."

I was writing against an earlier branch and Volkan had already fixed this.

llvm-svn: 297668

2 files changed, 3 insertions, 14 deletions

diff --git a/llvm/include/llvm/Target/TargetOpcodes.def b/llvm/include/llvm/Target/TargetOpcodes.def
index d5195c696da..e3ae2fae83e 100644
--- a/llvm/include/llvm/Target/TargetOpcodes.def
+++ b/llvm/include/llvm/Target/TargetOpcodes.def
@@ -392,17 +392,15 @@ HANDLE_TARGET_OPCODE(G_GEP)
 /// *down* to the given alignment.
 HANDLE_TARGET_OPCODE(G_PTR_MASK)
 
+/// Generic BRANCH instruction. This is an unconditional branch.
+HANDLE_TARGET_OPCODE(G_BR)
+
 /// Generic insertelement.
 HANDLE_TARGET_OPCODE(G_INSERT_VECTOR_ELT)
 
 /// Generic extractelement.
 HANDLE_TARGET_OPCODE(G_EXTRACT_VECTOR_ELT)
 
-/// Generic BRANCH instruction. This is an unconditional branch.
-HANDLE_TARGET_OPCODE(G_BR)
-// WARNING: make sure you update the PRE_ISEL_GENERIC_OPCODE_END if you put
-// anything after G_BR!!! Better yet, don't.
-
 // TODO: Add more generic opcodes as we move along.
 
 /// Marker for the end of the generic opcode.
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
index d4d05f627ae..087faa293de 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
@@ -138,12 +138,3 @@ broken:
 continue:
   ret void
 }
-
-; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: {{.*}} G_EXTRACT_VECTOR
-; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for unhandled_extract
-; FALLBACK-WITH-REPORT-OUT-LABEL: unhandled_extract:
-define i32 @unhandled_extract(<2 x i32> %in, i64 %elt) {
-  %tmp = extractelement <2 x i32> %in, i64 %elt
-  %res = add i32 %tmp, 1
-  ret i32 %res
-}