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| author | Sanjay Patel <spatel@rotateright.com> | 2017-07-15 15:29:47 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-07-15 15:29:47 +0000 |
| commit | 55b9f88ecc4420abf728c0563c6791d35972240f (patch) | |
| tree | c1592486fde696bf40056d3bfed3e593156ba452 | |
| parent | d994e3f35db28378171115855070ca821c7c3160 (diff) | |
| download | bcm5719-llvm-55b9f88ecc4420abf728c0563c6791d35972240f.tar.gz bcm5719-llvm-55b9f88ecc4420abf728c0563c6791d35972240f.zip | |
[InstCombine] allow (0 - x) & 1 --> x & 1 for vectors
llvm-svn: 308098
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 11 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/and2.ll | 3 |
2 files changed, 6 insertions, 8 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp index f044a6f1987..e8560099f9d 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp @@ -1284,6 +1284,11 @@ Instruction *InstCombiner::visitAnd(BinaryOperator &I) { if (Value *V = SimplifyBSwap(I, Builder)) return replaceInstUsesWith(I, V); + // (0 - x) & 1 --> x & 1 + Value *X; + if (match(Op1, m_One()) && match(Op0, m_Sub(m_Zero(), m_Value(X)))) + return BinaryOperator::CreateAnd(X, Op1); + if (ConstantInt *AndRHS = dyn_cast<ConstantInt>(Op1)) { const APInt &AndRHSMask = AndRHS->getValue(); @@ -1315,12 +1320,6 @@ Instruction *InstCombiner::visitAnd(BinaryOperator &I) { break; } - case Instruction::Sub: - // -x & 1 -> x & 1 - if (AndRHSMask.isOneValue() && match(Op0LHS, m_Zero())) - return BinaryOperator::CreateAnd(Op0RHS, AndRHS); - - break; case Instruction::Shl: case Instruction::LShr: diff --git a/llvm/test/Transforms/InstCombine/and2.ll b/llvm/test/Transforms/InstCombine/and2.ll index 001ac58891e..9b3bbfe4920 100644 --- a/llvm/test/Transforms/InstCombine/and2.ll +++ b/llvm/test/Transforms/InstCombine/and2.ll @@ -98,8 +98,7 @@ define i64 @test9(i64 %x) { ; combine -x & 1 into x & 1 define <2 x i64> @test9vec(<2 x i64> %x) { ; CHECK-LABEL: @test9vec( -; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i64> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[AND:%.*]] = and <2 x i64> [[SUB]], <i64 1, i64 1> +; CHECK-NEXT: [[AND:%.*]] = and <2 x i64> %x, <i64 1, i64 1> ; CHECK-NEXT: ret <2 x i64> [[AND]] ; %sub = sub nsw <2 x i64> <i64 0, i64 0>, %x |
