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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-05-02 15:30:07 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-05-02 15:30:07 +0000 |
| commit | 5447ae20ffe1790ade4e83eda3159098e041d913 (patch) | |
| tree | 3a463411f2d2c545ceff72406882cd7a120af049 | |
| parent | 5eff59e74cd2abc9560516aaf886f801b2809ba6 (diff) | |
| download | bcm5719-llvm-5447ae20ffe1790ade4e83eda3159098e041d913.tar.gz bcm5719-llvm-5447ae20ffe1790ade4e83eda3159098e041d913.zip | |
R600/SI: remove nonsense select pattern
Fortunately this pattern never matched, otherwise
we would have generated incorrect code.
Signed-off-by: Christian K??nig <christian.koenig@amd.com>
llvm-svn: 180921
| -rw-r--r-- | llvm/lib/Target/R600/SIInstructions.td | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td index 9faf89b51f1..7caafce0c8b 100644 --- a/llvm/lib/Target/R600/SIInstructions.td +++ b/llvm/lib/Target/R600/SIInstructions.td @@ -1026,18 +1026,11 @@ def S_MAX_U32 : SOP2_32 <0x00000009, "S_MAX_U32", []>; def S_CSELECT_B32 : SOP2 < 0x0000000a, (outs SReg_32:$dst), (ins SReg_32:$src0, SReg_32:$src1, SCCReg:$scc), "S_CSELECT_B32", - [(set (i32 SReg_32:$dst), (select (i1 SCCReg:$scc), - SReg_32:$src0, SReg_32:$src1))] + [] >; def S_CSELECT_B64 : SOP2_64 <0x0000000b, "S_CSELECT_B64", []>; -// f32 pattern for S_CSELECT_B32 -def : Pat < - (f32 (select (i1 SCCReg:$scc), SReg_32:$src0, SReg_32:$src1)), - (S_CSELECT_B32 SReg_32:$src0, SReg_32:$src1, SCCReg:$scc) ->; - def S_AND_B32 : SOP2_32 <0x0000000e, "S_AND_B32", []>; def S_AND_B64 : SOP2_64 <0x0000000f, "S_AND_B64", |
