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authorBenjamin Kramer <benny.kra@googlemail.com>2010-04-08 15:25:57 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2010-04-08 15:25:57 +0000
commit53dd088b5865963ac956a31b1dcdb68daab343df (patch)
tree306823cb6b97a9a8adcda8bfa4c2a9cbb3e1492e
parenta1eafb9afdc41f13ce53c31953065c2cd561ce77 (diff)
downloadbcm5719-llvm-53dd088b5865963ac956a31b1dcdb68daab343df.tar.gz
bcm5719-llvm-53dd088b5865963ac956a31b1dcdb68daab343df.zip
Various MSVC warning fixes about truncated 64 bit shifts and const pointers passed to free.
llvm-svn: 100767
-rw-r--r--llvm/lib/MC/MachObjectWriter.cpp4
-rw-r--r--llvm/lib/Support/regengine.inc2
-rw-r--r--llvm/utils/TableGen/ARMDecoderEmitter.cpp4
3 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/MC/MachObjectWriter.cpp b/llvm/lib/MC/MachObjectWriter.cpp
index fc35c365541..a533ccfdc64 100644
--- a/llvm/lib/MC/MachObjectWriter.cpp
+++ b/llvm/lib/MC/MachObjectWriter.cpp
@@ -477,7 +477,7 @@ public:
// actual expression addend without the PCrel bias. However, instructions
// with data following the relocation are not accomodated for (see comment
// below regarding SIGNED{1,2,4}), so it isn't exactly that either.
- Value += 1 << Log2Size;
+ Value += 1LL << Log2Size;
}
if (Target.isAbsolute()) { // constant
@@ -605,7 +605,7 @@ public:
// well based on the actual encoded instruction (the additional bias),
// but instead appear to just look at the final offset.
if (IsRIPRel) {
- switch (-(Target.getConstant() + (1 << Log2Size))) {
+ switch (-(Target.getConstant() + (1LL << Log2Size))) {
case 1: Type = RIT_X86_64_Signed1; break;
case 2: Type = RIT_X86_64_Signed2; break;
case 4: Type = RIT_X86_64_Signed4; break;
diff --git a/llvm/lib/Support/regengine.inc b/llvm/lib/Support/regengine.inc
index bf55543dab8..7e41f96f359 100644
--- a/llvm/lib/Support/regengine.inc
+++ b/llvm/lib/Support/regengine.inc
@@ -185,7 +185,7 @@ matcher(struct re_guts *g, const char *string, size_t nmatch,
endp = fast(m, start, stop, gf, gl);
if (endp == NULL) { /* a miss */
free(m->pmatch);
- free(m->lastpos);
+ free((void*)m->lastpos);
STATETEARDOWN(m);
return(REG_NOMATCH);
}
diff --git a/llvm/utils/TableGen/ARMDecoderEmitter.cpp b/llvm/utils/TableGen/ARMDecoderEmitter.cpp
index b9dcd43cd2a..29e9b8ad8c2 100644
--- a/llvm/utils/TableGen/ARMDecoderEmitter.cpp
+++ b/llvm/utils/TableGen/ARMDecoderEmitter.cpp
@@ -635,7 +635,7 @@ void Filter::recurse() {
// Marks all the segment positions with either BIT_TRUE or BIT_FALSE.
for (bitIndex = 0; bitIndex < NumBits; bitIndex++) {
- if (mapIterator->first & (1 << bitIndex))
+ if (mapIterator->first & (1ULL << bitIndex))
BitValueArray[StartBit + bitIndex] = BIT_TRUE;
else
BitValueArray[StartBit + bitIndex] = BIT_FALSE;
@@ -857,7 +857,7 @@ bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn,
return false;
if (Insn[StartBit + i] == BIT_TRUE)
- Field = Field | (1 << i);
+ Field = Field | (1ULL << i);
}
return true;
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