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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-01 15:23:31 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-01 15:23:31 +0000 |
| commit | 53698938a47b6ee20542a0619908932acd07f7d5 (patch) | |
| tree | 4c87d42011b25cbbcfbbb122a80b0de0cc9bd693 | |
| parent | 98f675a994601057687c09367ee7dba60f313859 (diff) | |
| download | bcm5719-llvm-53698938a47b6ee20542a0619908932acd07f7d5.tar.gz bcm5719-llvm-53698938a47b6ee20542a0619908932acd07f7d5.zip | |
R600: Use 64-bit alignment for 64-bit kernel arguments
llvm-svn: 187581
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUCallingConv.td | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/64bit-kernel-args.ll | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUCallingConv.td b/llvm/lib/Target/R600/AMDGPUCallingConv.td index 5c9a3e425dd..3865c621b5b 100644 --- a/llvm/lib/Target/R600/AMDGPUCallingConv.td +++ b/llvm/lib/Target/R600/AMDGPUCallingConv.td @@ -39,7 +39,7 @@ def CC_SI : CallingConv<[ // Calling convention for compute kernels def CC_AMDGPU_Kernel : CallingConv<[ CCIfType<[v4i32, v4f32], CCAssignToStack <16, 16>>, - CCIfType<[i64, f64], CCAssignToStack < 8, 4>>, + CCIfType<[i64, f64], CCAssignToStack < 8, 8>>, CCIfType<[i32, f32], CCAssignToStack < 4, 4>>, CCIfType<[i16], CCAssignToStack < 2, 4>>, CCIfType<[i8], CCAssignToStack < 1, 4>> diff --git a/llvm/test/CodeGen/R600/64bit-kernel-args.ll b/llvm/test/CodeGen/R600/64bit-kernel-args.ll index 2020e6565a9..3ad0e2ac0c4 100644 --- a/llvm/test/CodeGen/R600/64bit-kernel-args.ll +++ b/llvm/test/CodeGen/R600/64bit-kernel-args.ll @@ -1,6 +1,8 @@ ; RUN: llc < %s -march=r600 -mcpu=tahiti | FileCheck %s ; SI-CHECK: @f64_kernel_arg +; SI-CHECK-DAG: S_LOAD_DWORDX2 SGPR{{[0-9]}}_SGPR{{[0-9]}}, SGPR0_SGPR1, 9 +; SI-CHECK-DAG: S_LOAD_DWORDX2 SGPR{{[0-9]}}_SGPR{{[0-9]}}, SGPR0_SGPR1, 11 ; SI-CHECK: BUFFER_STORE_DWORDX2 define void @f64_kernel_arg(double addrspace(1)* %out, double %in) { entry: |
