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author | Tom Stellard <thomas.stellard@amd.com> | 2014-12-19 22:15:37 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-12-19 22:15:37 +0000 |
commit | 5352f35a89a8a527e51ac3a08fe6782be71bdbc9 (patch) | |
tree | 12b9a1c4e333d2923c0071e0fa73912397d64689 | |
parent | c3d7eeb6e561ecafd8e86fb52b287f0dcbd7453c (diff) | |
download | bcm5719-llvm-5352f35a89a8a527e51ac3a08fe6782be71bdbc9.tar.gz bcm5719-llvm-5352f35a89a8a527e51ac3a08fe6782be71bdbc9.zip |
R600/SI: isLegalOperand() shouldn't check constant bus for SALU instructions
The constant bus restrictions only apply to VALU instructions. This
enables SIFoldOperands to fold immediates into SALU instructions.
llvm-svn: 224623
-rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.cpp b/llvm/lib/Target/R600/SIInstrInfo.cpp index 08bfc5e1422..a58a46e862a 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -1405,7 +1405,7 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr *MI, unsigned OpIdx, if (!MO) MO = &MI->getOperand(OpIdx); - if (usesConstantBus(MRI, *MO)) { + if (isVALU(InstDesc.Opcode) && usesConstantBus(MRI, *MO)) { unsigned SGPRUsed = MO->isReg() ? MO->getReg() : (unsigned)AMDGPU::NoRegister; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { |