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| author | Craig Topper <craig.topper@gmail.com> | 2014-02-12 03:58:47 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2014-02-12 03:58:47 +0000 |
| commit | 522af294654547ca4eb1ded2325aeb43cbaf8c71 (patch) | |
| tree | caf735ff112762fef9a9e20a0ea5b713cadf3897 | |
| parent | 67530b694c6fec61b34f7ec85022c70837eea267 (diff) | |
| download | bcm5719-llvm-522af294654547ca4eb1ded2325aeb43cbaf8c71.tar.gz bcm5719-llvm-522af294654547ca4eb1ded2325aeb43cbaf8c71.zip | |
Test case I forgot to 'add' for r201126.
llvm-svn: 201207
| -rw-r--r-- | llvm/test/Analysis/BasicAA/pr18573.ll | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/llvm/test/Analysis/BasicAA/pr18573.ll b/llvm/test/Analysis/BasicAA/pr18573.ll new file mode 100644 index 00000000000..1d2a316b6ff --- /dev/null +++ b/llvm/test/Analysis/BasicAA/pr18573.ll @@ -0,0 +1,53 @@ +; RUN: opt %s -O2 -S | FileCheck %s + +; Check that llvm.x86.avx2.gather.d.ps.256 intrinsic is not eliminated as gather and store memory accesses are based on arr.ptr +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +; Function Attrs: nounwind readonly +declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, i8*, <8 x i32>, <8 x float>, i8) #0 + +; Function Attrs: nounwind +define <8 x float> @foo1(i8* noalias readonly %arr.ptr, <8 x i32>* noalias readonly %vix.ptr, i8* noalias %t2.ptr) #1 { +allocas: + %vix = load <8 x i32>* %vix.ptr, align 4 + %t1.ptr = getelementptr i8* %arr.ptr, i8 4 + + %v1 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2 + store i8 1, i8* %t1.ptr, align 4 + + %v2 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2 + %res = fadd <8 x float> %v1, %v2 + + ret <8 x float> %res +} +; CHECK: foo1 +; CHECK: llvm.x86.avx2.gather.d.ps.256 +; CHECK: store +; CHECK: llvm.x86.avx2.gather.d.ps.256 + +; Check that second gather is eliminated as gather and store memory accesses are based on different no-aliasing pointers + +; Function Attrs: nounwind +define <8 x float> @foo2(i8* noalias readonly %arr.ptr, <8 x i32>* noalias readonly %vix.ptr, i8* noalias %t2.ptr) #1 { +allocas: + %vix = load <8 x i32>* %vix.ptr, align 4 + %t1.ptr = getelementptr i8* %arr.ptr, i8 4 + + %v1 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2 + store i8 1, i8* %t2.ptr, align 4 + + %v2 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2 + %res = fadd <8 x float> %v1, %v2 + + ret <8 x float> %res +} +; CHECK: foo2 +; CHECK: llvm.x86.avx2.gather.d.ps.256 +; CHECK: store +; CHECK-NOT: llvm.x86.avx2.gather.d.ps.256 + +attributes #0 = { nounwind readonly } +attributes #1 = { nounwind "target-cpu"="corei7-avx" "target-features"="+avx2,+popcnt,+cmov,+f16c,+rdrnd,+fma" } +attributes #2 = { nounwind } + |
