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| author | Craig Topper <craig.topper@intel.com> | 2017-12-27 22:26:01 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-12-27 22:26:01 +0000 |
| commit | 520d055f66277541337c686944f47fb871bdd25b (patch) | |
| tree | 0f6243d399d814f4c08f75664d751c30bc83f8ce | |
| parent | 5bd93e99e2b656aca528190e60c8b098585dcb9a (diff) | |
| download | bcm5719-llvm-520d055f66277541337c686944f47fb871bdd25b.tar.gz bcm5719-llvm-520d055f66277541337c686944f47fb871bdd25b.zip | |
[X86] Don't accidentally enable PKU on cannon lake and icelake or CLWB on cannonlake.
We have cannonlake and icelake inheriting from skylake server in a switch using fallthroughs. But they aren't perfect supersets of skylake server.
llvm-svn: 321504
| -rw-r--r-- | clang/lib/Basic/Targets/X86.cpp | 6 | ||||
| -rw-r--r-- | clang/test/Preprocessor/predefined-arch-macros.c | 6 |
2 files changed, 10 insertions, 2 deletions
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index 097d9178c68..3efba26a837 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -152,8 +152,10 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "avx512dq", true); setFeatureEnabledImpl(Features, "avx512bw", true); setFeatureEnabledImpl(Features, "avx512vl", true); - setFeatureEnabledImpl(Features, "pku", true); - setFeatureEnabledImpl(Features, "clwb", true); + if (Kind == CK_SkylakeServer) { + setFeatureEnabledImpl(Features, "pku", true); + setFeatureEnabledImpl(Features, "clwb", true); + } LLVM_FALLTHROUGH; case CK_SkylakeClient: setFeatureEnabledImpl(Features, "xsavec", true); diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c index 31169f73999..dac137c5753 100644 --- a/clang/test/Preprocessor/predefined-arch-macros.c +++ b/clang/test/Preprocessor/predefined-arch-macros.c @@ -972,12 +972,14 @@ // CHECK_CNL_M32: #define __BMI2__ 1 // CHECK_CNL_M32: #define __BMI__ 1 // CHECK_CNL_M32: #define __CLFLUSHOPT__ 1 +// CHECK_CNL_M32-NOT: #define __CLWB__ 1 // CHECK_CNL_M32: #define __F16C__ 1 // CHECK_CNL_M32: #define __FMA__ 1 // CHECK_CNL_M32: #define __LZCNT__ 1 // CHECK_CNL_M32: #define __MMX__ 1 // CHECK_CNL_M32: #define __MPX__ 1 // CHECK_CNL_M32: #define __PCLMUL__ 1 +// CHECK_CNL_M32-NOT: #define __PKU__ 1 // CHECK_CNL_M32: #define __POPCNT__ 1 // CHECK_CNL_M32: #define __PRFCHW__ 1 // CHECK_CNL_M32: #define __RDRND__ 1 @@ -1017,12 +1019,14 @@ // CHECK_CNL_M64: #define __BMI2__ 1 // CHECK_CNL_M64: #define __BMI__ 1 // CHECK_CNL_M64: #define __CLFLUSHOPT__ 1 +// CHECK_CNL_M64-NOT: #define __CLWB__ 1 // CHECK_CNL_M64: #define __F16C__ 1 // CHECK_CNL_M64: #define __FMA__ 1 // CHECK_CNL_M64: #define __LZCNT__ 1 // CHECK_CNL_M64: #define __MMX__ 1 // CHECK_CNL_M64: #define __MPX__ 1 // CHECK_CNL_M64: #define __PCLMUL__ 1 +// CHECK_CNL_M64-NOT: #define __PKU__ 1 // CHECK_CNL_M64: #define __POPCNT__ 1 // CHECK_CNL_M64: #define __PRFCHW__ 1 // CHECK_CNL_M64: #define __RDRND__ 1 @@ -1075,6 +1079,7 @@ // CHECK_ICL_M32: #define __MMX__ 1 // CHECK_ICL_M32: #define __MPX__ 1 // CHECK_ICL_M32: #define __PCLMUL__ 1 +// CHECK_ICL_M32-NOT: #define __PKU__ 1 // CHECK_ICL_M32: #define __POPCNT__ 1 // CHECK_ICL_M32: #define __PRFCHW__ 1 // CHECK_ICL_M32: #define __RDRND__ 1 @@ -1128,6 +1133,7 @@ // CHECK_ICL_M64: #define __MMX__ 1 // CHECK_ICL_M64: #define __MPX__ 1 // CHECK_ICL_M64: #define __PCLMUL__ 1 +// CHECK_ICL_M64-NOT: #define __PKU__ 1 // CHECK_ICL_M64: #define __POPCNT__ 1 // CHECK_ICL_M64: #define __PRFCHW__ 1 // CHECK_ICL_M64: #define __RDRND__ 1 |
