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| author | Evan Cheng <evan.cheng@apple.com> | 2007-09-14 01:57:02 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-09-14 01:57:02 +0000 |
| commit | 5196f617a13f259a0ae2e06e25a3afb535e1c67b (patch) | |
| tree | 62b306ac19cd3557c1e93baeee7236838c8f64a5 | |
| parent | 36a6fcd327bc7bc35459451fa90bec022a5f1107 (diff) | |
| download | bcm5719-llvm-5196f617a13f259a0ae2e06e25a3afb535e1c67b.tar.gz bcm5719-llvm-5196f617a13f259a0ae2e06e25a3afb535e1c67b.zip | |
Fix comments.
llvm-svn: 41947
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp index cd504139ae5..2f1990e0170 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -157,8 +157,8 @@ PPCRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, .addReg(PPC::R0, false, false, true), FrameIdx); } else if (RC == PPC::VRRCRegisterClass) { // We don't have indexed addressing for vector loads. Emit: - // R11 = ADDI FI# - // Dest = LVX R0, R11 + // R0 = ADDI FI# + // STVX VAL, 0, R0 // // FIXME: We use R0 here, because it isn't available for RA. addFrameReference(BuildMI(MBB, MI, TII.get(PPC::ADDI), PPC::R0), @@ -210,8 +210,8 @@ PPCRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, BuildMI(MBB, MI, TII.get(PPC::MTCRF), DestReg).addReg(PPC::R0); } else if (RC == PPC::VRRCRegisterClass) { // We don't have indexed addressing for vector loads. Emit: - // R11 = ADDI FI# - // Dest = LVX R0, R11 + // R0 = ADDI FI# + // Dest = LVX 0, R0 // // FIXME: We use R0 here, because it isn't available for RA. addFrameReference(BuildMI(MBB, MI, TII.get(PPC::ADDI), PPC::R0), |
