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| author | Richard Osborne <richard@xmos.com> | 2014-02-25 17:31:15 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2014-02-25 17:31:15 +0000 |
| commit | 50e3b7f759d2087e426a6f67927c025ed0de7c36 (patch) | |
| tree | 9dae61c5ffb95b77481ced4b74a0109e22529c05 | |
| parent | 92fdd3491a1453cc471655e6361792549d9831d7 (diff) | |
| download | bcm5719-llvm-50e3b7f759d2087e426a6f67927c025ed0de7c36.tar.gz bcm5719-llvm-50e3b7f759d2087e426a6f67927c025ed0de7c36.zip | |
[XCore] Add intrinsic for CLRPT (clear port time) instruction.
llvm-svn: 202172
| -rw-r--r-- | llvm/include/llvm/IR/IntrinsicsXCore.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreInstrInfo.td | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/XCore/resources.ll | 8 |
3 files changed, 12 insertions, 1 deletions
diff --git a/llvm/include/llvm/IR/IntrinsicsXCore.td b/llvm/include/llvm/IR/IntrinsicsXCore.td index 085644cc641..b614e1ed6ec 100644 --- a/llvm/include/llvm/IR/IntrinsicsXCore.td +++ b/llvm/include/llvm/IR/IntrinsicsXCore.td @@ -67,6 +67,8 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.". [NoCapture<0>]>; def int_xcore_setpt : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], [NoCapture<0>]>; + def int_xcore_clrpt : Intrinsic<[],[llvm_anyptr_ty], + [NoCapture<0>]>; def int_xcore_getts : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty], [NoCapture<0>]>; def int_xcore_syncr : Intrinsic<[],[llvm_anyptr_ty], diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.td b/llvm/lib/Target/XCore/XCoreInstrInfo.td index 2dd2fc1a7d7..b243ee3510a 100644 --- a/llvm/lib/Target/XCore/XCoreInstrInfo.td +++ b/llvm/lib/Target/XCore/XCoreInstrInfo.td @@ -1028,7 +1028,8 @@ def WAITET_1R : _F1R<0b000010, (outs), (ins GRRegs:$a), "waitet $a", []>; def TSTART_1R : _F1R<0b000110, (outs), (ins GRRegs:$a), "start t[$a]", []>; -def CLRPT_1R : _F1R<0b100000, (outs), (ins GRRegs:$a), "clrpt res[$a]", []>; +def CLRPT_1R : _F1R<0b100000, (outs), (ins GRRegs:$a), "clrpt res[$a]", + [(int_xcore_clrpt GRRegs:$a)]>; // Zero operand short diff --git a/llvm/test/CodeGen/XCore/resources.ll b/llvm/test/CodeGen/XCore/resources.ll index 1b50d00e3a5..87bf3c204dc 100644 --- a/llvm/test/CodeGen/XCore/resources.ll +++ b/llvm/test/CodeGen/XCore/resources.ll @@ -15,6 +15,7 @@ declare void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value) declare void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value) declare i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value) declare i32 @llvm.xcore.outshr.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.clrpt.p1i8(i8 addrspace(1)* %r) declare void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value) declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r) declare void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r) @@ -141,6 +142,13 @@ define i32 @outshr(i32 %value, i8 addrspace(1)* %r) { ret i32 %result } +define void @clrpt(i8 addrspace(1)* %r) { +; CHECK-LABEL: clrpt: +; CHECK: clrpt res[r0] + call void @llvm.xcore.clrpt.p1i8(i8 addrspace(1)* %r) + ret void +} + define void @setpt(i8 addrspace(1)* %r, i32 %value) { ; CHECK-LABEL: setpt: ; CHECK: setpt res[r0], r1 |
