diff options
author | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2017-09-13 14:09:13 +0000 |
---|---|---|
committer | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2017-09-13 14:09:13 +0000 |
commit | 50e068158b1de0c1230a05514b7ab816aad33f15 (patch) | |
tree | 12177c36fe67314764c70076cefa57ac1ba5d1c5 | |
parent | 4eb2a96e7f74e7c2b1ae8b8121194f2f319ed032 (diff) | |
download | bcm5719-llvm-50e068158b1de0c1230a05514b7ab816aad33f15.tar.gz bcm5719-llvm-50e068158b1de0c1230a05514b7ab816aad33f15.zip |
[mips] correct operand range for DINSM instruction
This patch corrects the definition of the DINSM instruction.
Specification for DINSM instruction for Mips64 says that size operand should
be 2 <= size <= 64, but it is defined as uimm5_inssize_plus1 which gives
range of 1 .. 32.
Patch by Aleksandar Beserminji.
Differential Revision: https://reviews.llvm.org/D37683
llvm-svn: 313149
-rw-r--r-- | llvm/lib/Target/Mips/Mips64InstrInfo.td | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips64r2/valid.s | 1 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips64r6/valid.s | 1 |
3 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td index f367ff03a96..5082e4bab62 100644 --- a/llvm/lib/Target/Mips/Mips64InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips64InstrInfo.td @@ -331,7 +331,7 @@ let AdditionalPredicates = [NotInMicroMips] in { EXT_FM<7>, ISA_MIPS64R2; def DINSU : InsBase<"dinsu", GPR64Opnd, uimm5_plus32, uimm5_inssize_plus1>, EXT_FM<6>, ISA_MIPS64R2; - def DINSM : InsBase<"dinsm", GPR64Opnd, uimm5, uimm5_inssize_plus1>, + def DINSM : InsBase<"dinsm", GPR64Opnd, uimm5, uimm_range_2_64>, EXT_FM<5>, ISA_MIPS64R2; } diff --git a/llvm/test/MC/Mips/mips64r2/valid.s b/llvm/test/MC/Mips/mips64r2/valid.s index 0826391fcaa..4f6258e11f4 100644 --- a/llvm/test/MC/Mips/mips64r2/valid.s +++ b/llvm/test/MC/Mips/mips64r2/valid.s @@ -106,6 +106,7 @@ a: deret di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00] di # CHECK: di # encoding: [0x41,0x60,0x60,0x00] + dinsm $2,$3,4,34 # CHECK: dinsm $2, $3, 4, 34 # encoding: [0x7c,0x62,0x29,0x05] ddiv $zero,$k0,$s3 ddivu $zero,$s0,$s1 div $zero,$25,$11 diff --git a/llvm/test/MC/Mips/mips64r6/valid.s b/llvm/test/MC/Mips/mips64r6/valid.s index e04725c2329..f6cf6d45bee 100644 --- a/llvm/test/MC/Mips/mips64r6/valid.s +++ b/llvm/test/MC/Mips/mips64r6/valid.s @@ -114,6 +114,7 @@ a: ddivu $2,$3,$4 # CHECK: ddivu $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9f] di # CHECK: di # encoding: [0x41,0x60,0x60,0x00] di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00] + dinsm $2,$3,4,34 # CHECK: dinsm $2, $3, 4, 34 # encoding: [0x7c,0x62,0x29,0x05] div $2,$3,$4 # CHECK: div $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9a] divu $2,$3,$4 # CHECK: divu $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9b] dlsa $2, $3, $4, 3 # CHECK: dlsa $2, $3, $4, 3 # encoding: [0x00,0x64,0x10,0x95] |