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authorSimon Pilgrim <llvm-dev@redking.me.uk>2019-10-15 17:59:13 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2019-10-15 17:59:13 +0000
commit50dc09dd1640f9d0e16f7c1351f068f3f0711db2 (patch)
treecf1877fb98d822ac9ef9f5632d5dfa9a52680cd6
parentc7ec51a7c3ede8c1024b90d5fdc91979a9f01bf8 (diff)
downloadbcm5719-llvm-50dc09dd1640f9d0e16f7c1351f068f3f0711db2.tar.gz
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[X86] combineX86ShufflesRecursively - split the getTargetShuffleInputs call from the resolveTargetShuffleAndZeroables call.
Exposes an issue in getFauxShuffleMask where the OR(SHUFFLE,SHUFFLE) decode should always resolve zero/undef elements. Part of the fix for PR43024 where ideally we shouldn't call resolveTargetShuffleAndZeroables for Depth == 0 llvm-svn: 374928
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp12
1 files changed, 9 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index df08ebfe076..bdc05ad65f0 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -6932,9 +6932,9 @@ static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
SmallVector<int, 64> SrcMask0, SrcMask1;
SmallVector<SDValue, 2> SrcInputs0, SrcInputs1;
if (!getTargetShuffleInputs(N0, SrcInputs0, SrcMask0, DAG, Depth + 1,
- ResolveKnownElts) ||
+ true) ||
!getTargetShuffleInputs(N1, SrcInputs1, SrcMask1, DAG, Depth + 1,
- ResolveKnownElts))
+ true))
return false;
size_t MaskSize = std::max(SrcMask0.size(), SrcMask1.size());
SmallVector<int, 64> Mask0, Mask1;
@@ -33012,11 +33012,17 @@ static SDValue combineX86ShufflesRecursively(
"Can only combine shuffles of the same vector register size.");
// Extract target shuffle mask and resolve sentinels and inputs.
+ // TODO - determine Op's demanded elts from RootMask.
SmallVector<int, 64> OpMask;
SmallVector<SDValue, 2> OpInputs;
- if (!getTargetShuffleInputs(Op, OpInputs, OpMask, DAG, Depth))
+ APInt OpUndef, OpZero;
+ APInt OpDemandedElts = APInt::getAllOnesValue(VT.getVectorNumElements());
+ if (!getTargetShuffleInputs(Op, OpDemandedElts, OpInputs, OpMask, OpUndef,
+ OpZero, DAG, Depth, false))
return SDValue();
+ resolveTargetShuffleAndZeroables(OpMask, OpUndef, OpZero);
+
// Add the inputs to the Ops list, avoiding duplicates.
SmallVector<SDValue, 16> Ops(SrcOps.begin(), SrcOps.end());
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