let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean

llvm-svn: 25040

1 files changed, 2 insertions, 2 deletions

diff --git a/llvm/lib/Target/Alpha/AlphaInstrInfo.td b/llvm/lib/Target/Alpha/AlphaInstrInfo.td
index 36540f2a66f..13aab77c823 100644
--- a/llvm/lib/Target/Alpha/AlphaInstrInfo.td
+++ b/llvm/lib/Target/Alpha/AlphaInstrInfo.td
@@ -44,12 +44,12 @@ def invX : SDNodeXForm<imm, [{
 def immUExt8  : PatLeaf<(imm), [{
   // immUExt8 predicate - True if the immediate fits in a 8-bit zero extended
   // field.  Used by instructions like 'addi'.
-  return (unsigned long)N->getValue() == (unsigned char)N->getValue();
+  return (uint64_t)N->getValue() == (uint8_t)N->getValue();
 }]>;
 def immUExt8inv  : PatLeaf<(imm), [{
   // immUExt8inv predicate - True if the inverted immediate fits in a 8-bit zero extended
   // field.  Used by instructions like 'ornoti'.
-  return (unsigned long)~N->getValue() == (unsigned char)~N->getValue();
+  return (uint64_t)~N->getValue() == (uint8_t)~N->getValue();
 }], invX>;
 def immSExt16  : PatLeaf<(imm), [{
   // immSExt16 predicate - True if the immediate fits in a 16-bit sign extended