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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-01-11 18:03:23 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-01-11 18:03:23 +0000 |
| commit | 4ef6cfff6aec7fadf1fec41597534bc283214178 (patch) | |
| tree | c08dc488f3ea0cc796942c22a819a534e728469f | |
| parent | 999e6c296791cbf9b73ada4d0c8f57a9692974af (diff) | |
| download | bcm5719-llvm-4ef6cfff6aec7fadf1fec41597534bc283214178.tar.gz bcm5719-llvm-4ef6cfff6aec7fadf1fec41597534bc283214178.zip | |
[Hexagon] Cast elements to correct type when creating constant vector
llvm-svn: 322301
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/autohvx/isel-const-vector.ll | 12 |
2 files changed, 14 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index 7ab942a7ca0..d375fb4702e 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -2509,9 +2509,10 @@ HexagonTargetLowering::getBuildVectorConstInts(ArrayRef<SDValue> Values, Consts[i] = ConstantInt::get(IntTy, 0); continue; } + // Make sure to always cast to IntTy. if (auto *CN = dyn_cast<ConstantSDNode>(V.getNode())) { const ConstantInt *CI = CN->getConstantIntValue(); - Consts[i] = const_cast<ConstantInt*>(CI); + Consts[i] = ConstantInt::get(IntTy, CI->getValue().getSExtValue()); } else if (auto *CN = dyn_cast<ConstantFPSDNode>(V.getNode())) { const ConstantFP *CF = CN->getConstantFPValue(); APInt A = CF->getValueAPF().bitcastToAPInt(); diff --git a/llvm/test/CodeGen/Hexagon/autohvx/isel-const-vector.ll b/llvm/test/CodeGen/Hexagon/autohvx/isel-const-vector.ll new file mode 100644 index 00000000000..0ed1e0c562a --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/autohvx/isel-const-vector.ll @@ -0,0 +1,12 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; Check that the elements of the constants have correct type. +; CHECK: .half 31 + +define void @fred(<32 x i16>* %p) #0 { + store <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 16, i16 17, i16 18, i16 19, i16 20, i16 21, i16 22, i16 23, i16 24, i16 25, i16 26, i16 27, i16 28, i16 29, i16 30, i16 31>, <32 x i16>* %p, align 64 + ret void +} + +attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } + |
