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authorYi Kong <Yi.Kong@arm.com>2014-07-23 09:25:02 +0000
committerYi Kong <Yi.Kong@arm.com>2014-07-23 09:25:02 +0000
commit4de26fb2e005bbc008be93846e0e05e595342797 (patch)
treedb882e965d7e63435f152ae171d7cedf388652c7
parent30253f3247236ec15c87f7aab4f6cb97aef2dc1e (diff)
downloadbcm5719-llvm-4de26fb2e005bbc008be93846e0e05e595342797.tar.gz
bcm5719-llvm-4de26fb2e005bbc008be93846e0e05e595342797.zip
ARM: Add doc for ACLE memory barrier intrinsics
Add documentations for ACLE memory barrier intrinsics, describing their motion barrier characteristics. llvm-svn: 213733
-rw-r--r--clang/docs/LanguageExtensions.rst13
1 files changed, 13 insertions, 0 deletions
diff --git a/clang/docs/LanguageExtensions.rst b/clang/docs/LanguageExtensions.rst
index 4c600868e9e..50e1ccebe87 100644
--- a/clang/docs/LanguageExtensions.rst
+++ b/clang/docs/LanguageExtensions.rst
@@ -1634,6 +1634,19 @@ Target-Specific Extensions
Clang supports some language features conditionally on some targets.
+ARM/AArch64 Language Extensions
+-------------------------------
+
+Memory Barrier Intrinsics
+^^^^^^^^^^^^^^^^^^^^^^^^^
+Clang implements the ``__dmb``, ``__dsb`` and ``__isb`` intrinsics as defined
+in the `ARM C Language Extensions Release 2.0
+<http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053c/IHI0053C_acle_2_0.pdf>`_.
+Note that these intrinsics are implemented as motion barriers that block
+reordering of memory accesses and side effect instructions. Other instructions
+like simple arithmatic may be reordered around the intrinsic. If you expect to
+have no reordering at all, use inline assembly instead.
+
X86/X86-64 Language Extensions
------------------------------
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