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authorCraig Topper <craig.topper@intel.com>2019-02-18 06:46:17 +0000
committerCraig Topper <craig.topper@intel.com>2019-02-18 06:46:17 +0000
commit4cf59aaf088b4e559f06bbba9361e01839ff5c86 (patch)
tree24c2b0eeb582272d5fbcc8dab60c4b84b51f7b40
parent6798a65a2466e5c05e25ee481c31536e03abd516 (diff)
downloadbcm5719-llvm-4cf59aaf088b4e559f06bbba9361e01839ff5c86.tar.gz
bcm5719-llvm-4cf59aaf088b4e559f06bbba9361e01839ff5c86.zip
[MC] Make SubtargetFeatureKV only store one FeatureBitset and use an 'unsigned' to hold the value.
This class is used for two difference tablegen generated tables. For one of the tables the Value FeatureBitset only has one bit set. For the other usage the Implies field was unused. This patch changes the Value field to just be an unsigned. For the usage that put a real vector in bitset, we now use the previously unused Implies field and leave the Value field unused instead. This is good for a 16K reduction in the size of llc on my local build with all targets enabled. llvm-svn: 354243
-rw-r--r--llvm/include/llvm/MC/SubtargetFeature.h2
-rw-r--r--llvm/lib/MC/SubtargetFeature.cpp22
-rw-r--r--llvm/utils/TableGen/SubtargetEmitter.cpp12
3 files changed, 18 insertions, 18 deletions
diff --git a/llvm/include/llvm/MC/SubtargetFeature.h b/llvm/include/llvm/MC/SubtargetFeature.h
index 5f49d3894ae..9c0a3f6e45f 100644
--- a/llvm/include/llvm/MC/SubtargetFeature.h
+++ b/llvm/include/llvm/MC/SubtargetFeature.h
@@ -52,7 +52,7 @@ public:
struct SubtargetFeatureKV {
const char *Key; ///< K-V key string
const char *Desc; ///< Help descriptor
- FeatureBitset Value; ///< K-V integer value
+ unsigned Value; ///< K-V integer value
FeatureBitset Implies; ///< K-V bit mask
/// Compare routine for std::lower_bound
diff --git a/llvm/lib/MC/SubtargetFeature.cpp b/llvm/lib/MC/SubtargetFeature.cpp
index 793f00d46ed..50f979b9d11 100644
--- a/llvm/lib/MC/SubtargetFeature.cpp
+++ b/llvm/lib/MC/SubtargetFeature.cpp
@@ -127,8 +127,8 @@ void SetImpliedBits(FeatureBitset &Bits, const SubtargetFeatureKV &FeatureEntry,
for (const SubtargetFeatureKV &FE : FeatureTable) {
if (FeatureEntry.Value == FE.Value) continue;
- if ((FeatureEntry.Implies & FE.Value).any()) {
- Bits |= FE.Value;
+ if (FeatureEntry.Implies.test(FE.Value)) {
+ Bits.set(FE.Value);
SetImpliedBits(Bits, FE, FeatureTable);
}
}
@@ -142,8 +142,8 @@ void ClearImpliedBits(FeatureBitset &Bits,
for (const SubtargetFeatureKV &FE : FeatureTable) {
if (FeatureEntry.Value == FE.Value) continue;
- if ((FE.Implies & FeatureEntry.Value).any()) {
- Bits &= ~FE.Value;
+ if (FE.Implies.test(FeatureEntry.Value)) {
+ Bits.reset(FE.Value);
ClearImpliedBits(Bits, FE, FeatureTable);
}
}
@@ -157,12 +157,12 @@ SubtargetFeatures::ToggleFeature(FeatureBitset &Bits, StringRef Feature,
Find(StripFlag(Feature), FeatureTable);
// If there is a match
if (FeatureEntry) {
- if ((Bits & FeatureEntry->Value) == FeatureEntry->Value) {
- Bits &= ~FeatureEntry->Value;
+ if (Bits.test(FeatureEntry->Value)) {
+ Bits.reset(FeatureEntry->Value);
// For each feature that implies this, clear it.
ClearImpliedBits(Bits, *FeatureEntry, FeatureTable);
} else {
- Bits |= FeatureEntry->Value;
+ Bits.set(FeatureEntry->Value);
// For each feature that this implies, set it.
SetImpliedBits(Bits, *FeatureEntry, FeatureTable);
@@ -184,12 +184,12 @@ void SubtargetFeatures::ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature,
if (FeatureEntry) {
// Enable/disable feature in bits
if (isEnabled(Feature)) {
- Bits |= FeatureEntry->Value;
+ Bits.set(FeatureEntry->Value);
// For each feature that this implies, set it.
SetImpliedBits(Bits, *FeatureEntry, FeatureTable);
} else {
- Bits &= ~FeatureEntry->Value;
+ Bits.reset(FeatureEntry->Value);
// For each feature that implies this, clear it.
ClearImpliedBits(Bits, *FeatureEntry, FeatureTable);
@@ -225,11 +225,11 @@ SubtargetFeatures::getFeatureBits(StringRef CPU,
// If there is a match
if (CPUEntry) {
// Set base feature bits
- Bits = CPUEntry->Value;
+ Bits = CPUEntry->Implies;
// Set the feature implied by this CPU feature, if any.
for (auto &FE : FeatureTable) {
- if ((CPUEntry->Value & FE.Value).any())
+ if (CPUEntry->Implies.test(FE.Value))
SetImpliedBits(Bits, FE, FeatureTable);
}
} else {
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index 792c957ea19..92b85d88235 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -203,7 +203,7 @@ unsigned SubtargetEmitter::FeatureKeyValues(raw_ostream &OS) {
OS << " { "
<< "\"" << CommandLineName << "\", "
<< "\"" << Desc << "\", "
- << "{ " << Target << "::" << Name << " }, ";
+ << Target << "::" << Name << ", ";
RecVec ImpliesList = Feature->getValueAsListOfDefs("Implies");
@@ -242,18 +242,18 @@ unsigned SubtargetEmitter::CPUKeyValues(raw_ostream &OS) {
StringRef Name = Processor->getValueAsString("Name");
RecVec FeatureList = Processor->getValueAsListOfDefs("Features");
- // Emit as { "cpu", "description", { f1 , f2 , ... fn } },
- OS << " { "
+ // Emit as { "cpu", "description", 0, { f1 , f2 , ... fn } },
+ // The 0 is for the feature id which isn't used for CPUs.
+ OS << " { "
<< "\"" << Name << "\", "
- << "\"Select the " << Name << " processor\", ";
+ << "\"Select the " << Name << " processor\", 0, ";
OS << "{";
for (unsigned j = 0, M = FeatureList.size(); j < M;) {
OS << " " << Target << "::" << FeatureList[j]->getName();
if (++j < M) OS << ",";
}
- // The { } is for the "implies" section of this data structure.
- OS << " }, { } },\n";
+ OS << " } },\n";
}
// End processor table
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