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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-11-02 23:46:59 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-11-02 23:46:59 +0000 |
| commit | 4cd1d4ecb1a89d6201c24df5f48dd4c5366747fe (patch) | |
| tree | 8a5b035a13b844f7cc0df50425ebbbef51b3ffbc | |
| parent | 7d858d87cded040a339be4cc8890aa97b6de1571 (diff) | |
| download | bcm5719-llvm-4cd1d4ecb1a89d6201c24df5f48dd4c5366747fe.tar.gz bcm5719-llvm-4cd1d4ecb1a89d6201c24df5f48dd4c5366747fe.zip | |
R600: Don't unnecessarily repeat the register class
llvm-svn: 221119
| -rw-r--r-- | llvm/lib/Target/R600/R600Instructions.td | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/R600/R600Instructions.td b/llvm/lib/Target/R600/R600Instructions.td index 114c6e4db35..7ce05a21062 100644 --- a/llvm/lib/Target/R600/R600Instructions.td +++ b/llvm/lib/Target/R600/R600Instructions.td @@ -475,13 +475,13 @@ class ExportBufWord1 { multiclass ExportPattern<Instruction ExportInst, bits<8> cf_inst> { def : Pat<(int_R600_store_pixel_depth R600_Reg32:$reg), (ExportInst - (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), R600_Reg32:$reg, sub0), + (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), $reg, sub0), 0, 61, 0, 7, 7, 7, cf_inst, 0) >; def : Pat<(int_R600_store_pixel_stencil R600_Reg32:$reg), (ExportInst - (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), R600_Reg32:$reg, sub0), + (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), $reg, sub0), 0, 61, 7, 0, 7, 7, cf_inst, 0) >; @@ -513,17 +513,17 @@ multiclass SteamOutputExportPattern<Instruction ExportInst, // Stream1 def : Pat<(int_R600_store_stream_output (v4f32 R600_Reg128:$src), (i32 imm:$arraybase), (i32 1), (i32 imm:$mask)), - (ExportInst R600_Reg128:$src, 0, imm:$arraybase, + (ExportInst $src, 0, imm:$arraybase, 4095, imm:$mask, buf1inst, 0)>; // Stream2 def : Pat<(int_R600_store_stream_output (v4f32 R600_Reg128:$src), (i32 imm:$arraybase), (i32 2), (i32 imm:$mask)), - (ExportInst R600_Reg128:$src, 0, imm:$arraybase, + (ExportInst $src, 0, imm:$arraybase, 4095, imm:$mask, buf2inst, 0)>; // Stream3 def : Pat<(int_R600_store_stream_output (v4f32 R600_Reg128:$src), (i32 imm:$arraybase), (i32 3), (i32 imm:$mask)), - (ExportInst R600_Reg128:$src, 0, imm:$arraybase, + (ExportInst $src, 0, imm:$arraybase, 4095, imm:$mask, buf3inst, 0)>; } |
