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| author | Jim Grosbach <grosbach@apple.com> | 2011-09-15 19:46:13 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-09-15 19:46:13 +0000 |
| commit | 4cbe06e7f8ec8c953e856e1d2c060dfbe0a51298 (patch) | |
| tree | ceb0e030ebb4ce0d83a1def5957136caa3e5f744 | |
| parent | 8a880e3ff613e7592d1824f87ed6c9391cc745aa (diff) | |
| download | bcm5719-llvm-4cbe06e7f8ec8c953e856e1d2c060dfbe0a51298.tar.gz bcm5719-llvm-4cbe06e7f8ec8c953e856e1d2c060dfbe0a51298.zip | |
Thumb2 assembly parsing and encoding for REV16/REVSH.
llvm-svn: 139828
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb2.td | 4 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/basic-thumb2-instructions.s | 32 |
2 files changed, 35 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td index 9467f36f984..60435977612 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb2.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -3841,5 +3841,7 @@ def : t2InstAlias<"push${p} $regs", (t2STMDB_UPD SP, pred:$p, reglist:$regs)>; def : t2InstAlias<"pop${p}.w $regs", (t2LDMIA_UPD SP, pred:$p, reglist:$regs)>; def : t2InstAlias<"pop${p} $regs", (t2LDMIA_UPD SP, pred:$p, reglist:$regs)>; -// Alias for REV without the ".w" optional width specifier. +// Alias for REV/REV16/REVSH without the ".w" optional width specifier. def : t2InstAlias<"rev${p} $Rd, $Rm", (t2REV rGPR:$Rd, rGPR:$Rm, pred:$p)>; +def : t2InstAlias<"rev16${p} $Rd, $Rm", (t2REV16 rGPR:$Rd, rGPR:$Rm, pred:$p)>; +def : t2InstAlias<"revsh${p} $Rd, $Rm", (t2REVSH rGPR:$Rd, rGPR:$Rm, pred:$p)>; diff --git a/llvm/test/MC/ARM/basic-thumb2-instructions.s b/llvm/test/MC/ARM/basic-thumb2-instructions.s index 9723407bbb0..26be6f0e252 100644 --- a/llvm/test/MC/ARM/basic-thumb2-instructions.s +++ b/llvm/test/MC/ARM/basic-thumb2-instructions.s @@ -1442,6 +1442,38 @@ _func: @------------------------------------------------------------------------------ +@ REV16 +@------------------------------------------------------------------------------ + rev16.w r1, r2 + rev16 r2, r8 + itt ne + rev16ne r1, r2 + rev16ne r1, r8 + + rev16.w r1, r2 @ encoding: [0x92,0xfa,0x92,0xf1] + rev16.w r2, r8 @ encoding: [0x98,0xfa,0x98,0xf2] + itt ne @ encoding: [0x1c,0xbf] + rev16ne r1, r2 @ encoding: [0x51,0xba] + rev16ne.w r1, r8 @ encoding: [0x98,0xfa,0x98,0xf1] + + +@------------------------------------------------------------------------------ +@ REVSH +@------------------------------------------------------------------------------ + revsh.w r1, r2 + revsh r2, r8 + itt ne + revshne r1, r2 + revshne r1, r8 + + revsh.w r1, r2 @ encoding: [0x92,0xfa,0xb2,0xf1] + revsh.w r2, r8 @ encoding: [0x98,0xfa,0xb8,0xf2] + itt ne @ encoding: [0x1c,0xbf] + revshne r1, r2 @ encoding: [0xd1,0xba] + revshne.w r1, r8 @ encoding: [0x98,0xfa,0xb8,0xf1] + + +@------------------------------------------------------------------------------ @ SUB (register) @------------------------------------------------------------------------------ sub.w r5, r2, r12, rrx |
