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| author | Craig Topper <craig.topper@intel.com> | 2018-03-26 02:17:12 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-03-26 02:17:12 +0000 |
| commit | 4bf23eddafe47b7fe55b294844b4503f81022e03 (patch) | |
| tree | 929606b39ee5a1b9a24e8b0a38d4b07e154251a6 | |
| parent | 48d19f6961475b2633a8c14a4966bde981820735 (diff) | |
| download | bcm5719-llvm-4bf23eddafe47b7fe55b294844b4503f81022e03.tar.gz bcm5719-llvm-4bf23eddafe47b7fe55b294844b4503f81022e03.zip | |
[X86] Give VMOVSX/ZX the same itinerary as the SSE version so they'll reuse the same generated scheduler class.
llvm-svn: 328468
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 17 |
1 files changed, 6 insertions, 11 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 4db7e1c3ef8..2ec2f902750 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -5340,30 +5340,25 @@ multiclass SS41I_pmovx_rrrm<bits<8> opc, string OpcodeStr, X86MemOperand MemOp, multiclass SS41I_pmovx_rm_all<bits<8> opc, string OpcodeStr, X86MemOperand MemOp, X86MemOperand MemYOp, - OpndItins SSEItins, OpndItins AVXItins, - OpndItins AVX2Itins, Predicate prd> { - defm NAME : SS41I_pmovx_rrrm<opc, OpcodeStr, MemOp, VR128, VR128, SSEItins>; + OpndItins itins, Predicate prd> { + defm NAME : SS41I_pmovx_rrrm<opc, OpcodeStr, MemOp, VR128, VR128, itins>; let Predicates = [HasAVX, prd] in defm V#NAME : SS41I_pmovx_rrrm<opc, !strconcat("v", OpcodeStr), MemOp, - VR128, VR128, AVXItins>, VEX, VEX_WIG; + VR128, VR128, itins>, VEX, VEX_WIG; let Predicates = [HasAVX2, prd] in defm V#NAME#Y : SS41I_pmovx_rrrm<opc, !strconcat("v", OpcodeStr), MemYOp, - VR256, VR128, AVX2Itins>, VEX, VEX_L, VEX_WIG; + VR256, VR128, itins>, VEX, VEX_L, VEX_WIG; } multiclass SS41I_pmovx_rm<bits<8> opc, string OpcodeStr, X86MemOperand MemOp, X86MemOperand MemYOp, Predicate prd> { defm PMOVSX#NAME : SS41I_pmovx_rm_all<opc, !strconcat("pmovsx", OpcodeStr), MemOp, MemYOp, - SSE_INTALU_ITINS_SHUFF_P, - DEFAULT_ITINS_SHUFFLESCHED, - DEFAULT_ITINS_SHUFFLESCHED, prd>; + SSE_INTALU_ITINS_SHUFF_P, prd>; defm PMOVZX#NAME : SS41I_pmovx_rm_all<!add(opc, 0x10), !strconcat("pmovzx", OpcodeStr), MemOp, MemYOp, - SSE_INTALU_ITINS_SHUFF_P, - DEFAULT_ITINS_SHUFFLESCHED, - DEFAULT_ITINS_SHUFFLESCHED, prd>; + SSE_INTALU_ITINS_SHUFF_P, prd>; } defm BW : SS41I_pmovx_rm<0x20, "bw", i64mem, i128mem, NoVLX_Or_NoBWI>; |
