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| author | Craig Topper <craig.topper@intel.com> | 2018-12-18 04:58:07 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-12-18 04:58:07 +0000 |
| commit | 4adf9ca73809204bd34bba7f062528a3e78abc0d (patch) | |
| tree | d8dc1c70392551e74cc4fd61535f0c05d8ba1deb | |
| parent | 1ff7356f963a891b94908045ae938d441642ecea (diff) | |
| download | bcm5719-llvm-4adf9ca73809204bd34bba7f062528a3e78abc0d.tar.gz bcm5719-llvm-4adf9ca73809204bd34bba7f062528a3e78abc0d.zip | |
[X86] Add test case for PR40060. NFC
llvm-svn: 349441
| -rw-r--r-- | llvm/test/CodeGen/X86/bmi.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/bmi.ll b/llvm/test/CodeGen/X86/bmi.ll index be6f193414a..2ca66570ae2 100644 --- a/llvm/test/CodeGen/X86/bmi.ll +++ b/llvm/test/CodeGen/X86/bmi.ll @@ -681,3 +681,35 @@ define i64 @blsr_disguised_shrunk_add(i64 %x) { %c = and i64 %b, %a ret i64 %c } + +; FIXME: We should not be using the S flag from BEXTR. +define void @pr40060(i32, i32) { +; X86-LABEL: pr40060: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax +; X86-NEXT: js .LBB33_1 +; X86-NEXT: # %bb.2: +; X86-NEXT: jmp bar # TAILCALL +; X86-NEXT: .LBB33_1: +; X86-NEXT: retl +; +; X64-LABEL: pr40060: +; X64: # %bb.0: +; X64-NEXT: bextrl %esi, %edi, %eax +; X64-NEXT: js .LBB33_1 +; X64-NEXT: # %bb.2: +; X64-NEXT: jmp bar # TAILCALL +; X64-NEXT: .LBB33_1: +; X64-NEXT: retq + %3 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %0, i32 %1) + %4 = icmp sgt i32 %3, -1 + br i1 %4, label %5, label %6 + + tail call void @bar() + br label %6 + + ret void +} + +declare void @bar() |
