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authorCraig Topper <craig.topper@intel.com>2017-11-27 22:01:17 +0000
committerCraig Topper <craig.topper@intel.com>2017-11-27 22:01:17 +0000
commit4aa519507d3234cf7843f1c6079dc783ed088dc2 (patch)
treec4c1f65ecc933f0479ac2d0f28f2c9195dab9388
parent1384ee936e46816f348bc3756704aeaff92e86fe (diff)
downloadbcm5719-llvm-4aa519507d3234cf7843f1c6079dc783ed088dc2.tar.gz
bcm5719-llvm-4aa519507d3234cf7843f1c6079dc783ed088dc2.zip
[X86] Remove lines that set v8f32 FP_ROUND/FP_EXTEND to Legal under AVX512. NFCI
We don't do this for narrow vectors under AVX or SSE features. We also don't set them to Expand like we do for many vectors op. Nor does TargetLoweringBase.cpp. This leads me to believe these default to Legal. llvm-svn: 319103
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp2
1 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 36e83881270..4580466f090 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1202,8 +1202,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::UINT_TO_FP, MVT::v4i1, Custom);
setOperationAction(ISD::SINT_TO_FP, MVT::v2i1, Custom);
setOperationAction(ISD::UINT_TO_FP, MVT::v2i1, Custom);
- setOperationAction(ISD::FP_ROUND, MVT::v8f32, Legal);
- setOperationAction(ISD::FP_EXTEND, MVT::v8f32, Legal);
setTruncStoreAction(MVT::v8i64, MVT::v8i8, Legal);
setTruncStoreAction(MVT::v8i64, MVT::v8i16, Legal);
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