WebAssembly: handle `ret void`.

Summary:
Use -1 as numoperands for the return SDTypeProfile, denoting that return is variadic. Note that the patterns in InstrControl.td still need to match the inputs, so this ins't an "anything goes" variadic on ret!

The next step will be to handle other local types (not just int32).

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11692

llvm-svn: 243783

4 files changed, 13 insertions, 3 deletions

diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 90a4078b407..81c03fff05c 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -146,8 +146,7 @@ SDValue WebAssemblyTargetLowering::LowerReturn(
 
   SmallVector<SDValue, 4> RetOps(1, Chain);
   RetOps.append(OutVals.begin(), OutVals.end());
-  const SDValue Ops[] = {Chain, OutVals.front()};
-  Chain = DAG.getNode(WebAssemblyISD::RETURN, DL, MVT::Other, Ops);
+  Chain = DAG.getNode(WebAssemblyISD::RETURN, DL, MVT::Other, RetOps);
 
   return Chain;
 }
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
index 59e6e3b6711..6ec345bf37d 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
@@ -29,5 +29,6 @@ let hasSideEffects = 1, isReturn = 1, isTerminator = 1, hasCtrlDep = 1,
     isBarrier = 1 in {
 //FIXME return more than just int32.
 def RETURN : I<(outs), (ins Int32:$val), [(WebAssemblyreturn Int32:$val)]>;
+def RETURN_VOID : I<(outs), (ins), [(WebAssemblyreturn)]>;
 } // hasSideEffects = 1, isReturn = 1, isTerminator = 1, hasCtrlDep = 1,
   // isBarrier = 1
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
index 6084d14874a..912f84c6b9a 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
@@ -26,7 +26,7 @@ def HasSIMD128 : Predicate<"Subtarget->hasSIMD128()">,
 //===----------------------------------------------------------------------===//
 
 def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
-def SDT_WebAssemblyReturn   : SDTypeProfile<0, 1, []>;
+def SDT_WebAssemblyReturn   : SDTypeProfile<0, -1, []>;
 
 //===----------------------------------------------------------------------===//
 // WebAssembly-specific DAG Nodes.
diff --git a/llvm/test/CodeGen/WebAssembly/return-void.ll b/llvm/test/CodeGen/WebAssembly/return-void.ll
new file mode 100644
index 00000000000..f9361d6c646
--- /dev/null
+++ b/llvm/test/CodeGen/WebAssembly/return-void.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; CHECK-LABEL: return_void:
+; CHECK-NEXT: (RETURN_VOID)
+define void @return_void() {
+  ret void
+}