[ScopInfo] Fix domains after loops.

ISL can conclude additional conditions on parameters from restrictions
on loop variables. Such conditions persist when leaving the loop and the
loop variable is projected out. This results in a narrower domain for
exiting the loop than entering it and is logically impossible for
non-infinite loops.

We fix this by not adding a lower bound i>=0 when constructing BB
domains, but defer it to when also the upper bound it computed, which
was done redundantly even before this patch.

This reduces the number of LNT fails with -polly-process-unprofitable
-polly-position=before-vectorizer from 8 to 6.

llvm-svn: 264118

11 files changed, 131 insertions, 66 deletions

diff --git a/polly/lib/Analysis/ScopInfo.cpp b/polly/lib/Analysis/ScopInfo.cpp
index 9d93982cc50..166b954210f 100644
--- a/polly/lib/Analysis/ScopInfo.cpp
+++ b/polly/lib/Analysis/ScopInfo.cpp
@@ -2101,7 +2101,6 @@ static bool containsErrorBlock(RegionNode *RN, const Region &R, LoopInfo &LI,
 
 static inline __isl_give isl_set *addDomainDimId(__isl_take isl_set *Domain,
                                                  unsigned Dim, Loop *L) {
-  Domain = isl_set_lower_bound_si(Domain, isl_dim_set, Dim, -1);
   isl_id *DimId =
       isl_id_alloc(isl_set_get_ctx(Domain), nullptr, static_cast<void *>(L));
   return isl_set_set_dim_id(Domain, isl_dim_set, Dim, DimId);
@@ -2366,7 +2365,6 @@ void Scop::propagateDomainConstraints(Region *R, ScopDetection &SD,
     }
 
     Loop *BBLoop = getRegionNodeLoop(RN, LI);
-    int BBLoopDepth = getRelativeLoopDepth(BBLoop);
 
     isl_set *PredDom = isl_set_empty(isl_set_get_space(Domain));
     for (auto *PredBB : predecessors(BB)) {
@@ -2383,32 +2381,30 @@ void Scop::propagateDomainConstraints(Region *R, ScopDetection &SD,
 
       if (!PredBBDom) {
         // Determine the loop depth of the predecessor and adjust its domain to
-        // the domain of the current block. This can mean we have to:
-        //  o) Drop a dimension if this block is the exit of a loop, not the
-        //     header of a new loop and the predecessor was part of the loop.
-        //  o) Add an unconstrainted new dimension if this block is the header
-        //     of a loop and the predecessor is not part of it.
-        //  o) Drop the information about the innermost loop dimension when the
-        //     predecessor and the current block are surrounded by different
-        //     loops in the same depth.
+        // the domain of the current block. This means we have to:
+        //  o) Drop all loop dimension of loops we are leaving.
+        //  o) Add a dimension for each loop we are entering.
         PredBBDom = getDomainForBlock(PredBB, DomainMap, *R->getRegionInfo());
         Loop *PredBBLoop = LI.getLoopFor(PredBB);
         while (BoxedLoops.count(PredBBLoop))
           PredBBLoop = PredBBLoop->getParentLoop();
 
-        int PredBBLoopDepth = getRelativeLoopDepth(PredBBLoop);
-        unsigned LoopDepthDiff = std::abs(BBLoopDepth - PredBBLoopDepth);
-        if (BBLoopDepth < PredBBLoopDepth)
-          PredBBDom = isl_set_project_out(
-              PredBBDom, isl_dim_set, isl_set_n_dim(PredBBDom) - LoopDepthDiff,
-              LoopDepthDiff);
-        else if (PredBBLoopDepth < BBLoopDepth) {
-          assert(LoopDepthDiff == 1);
-          PredBBDom = isl_set_add_dims(PredBBDom, isl_dim_set, 1);
-        } else if (BBLoop != PredBBLoop && BBLoopDepth >= 0) {
-          assert(LoopDepthDiff <= 1);
-          PredBBDom = isl_set_drop_constraints_involving_dims(
-              PredBBDom, isl_dim_set, BBLoopDepth, 1);
+        Loop *LeaveL = PredBBLoop;
+        while (getRegion().contains(LeaveL) &&
+               (!BBLoop || !LeaveL->contains(BBLoop))) {
+          PredBBDom = isl_set_project_out(PredBBDom, isl_dim_set,
+                                          isl_set_n_dim(PredBBDom) - 1, 1);
+          LeaveL = LeaveL->getParentLoop();
+        }
+        unsigned CommonDepth = isl_set_n_dim(PredBBDom);
+
+        Loop *EnterL = BBLoop;
+        while (getRegion().contains(EnterL) &&
+               (!PredBBLoop || !EnterL->contains(PredBBLoop))) {
+          PredBBDom =
+              isl_set_insert_dims(PredBBDom, isl_dim_set, CommonDepth, 1);
+          PredBBDom = addDomainDimId(PredBBDom, CommonDepth, EnterL);
+          EnterL = EnterL->getParentLoop();
         }
       }
 
diff --git a/polly/test/Isl/CodeGen/phi_scalar_simple_1.ll b/polly/test/Isl/CodeGen/phi_scalar_simple_1.ll
index c39b24f7caf..895d32902dd 100644
--- a/polly/test/Isl/CodeGen/phi_scalar_simple_1.ll
+++ b/polly/test/Isl/CodeGen/phi_scalar_simple_1.ll
@@ -28,7 +28,7 @@ entry:
 ; CHECK-LABEL: polly.start:
 ; CHECK:         store i32 %x, i32* %x.addr.0.phiops
 
-; CHECK-LABEL: polly.merge:
+; CHECK-LABEL: polly.exiting:
 ; CHECK:         %x.addr.0.final_reload = load i32, i32* %x.addr.0.s2a
 
 for.cond:                                         ; preds = %for.inc4, %entry
diff --git a/polly/test/ScopInfo/intra_and_inter_bb_scalar_dep.ll b/polly/test/ScopInfo/intra_and_inter_bb_scalar_dep.ll
index 7db4f5f2a81..4e6fbc8df1e 100644
--- a/polly/test/ScopInfo/intra_and_inter_bb_scalar_dep.ll
+++ b/polly/test/ScopInfo/intra_and_inter_bb_scalar_dep.ll
@@ -15,7 +15,7 @@
 ; CHECK:      Invariant Accesses: {
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:             [N] -> { Stmt_for_j[i0, i1] -> MemRef_init_ptr[0] };
-; CHECK-NEXT:         Execution Context: [N] -> {  : N < 0 or N > 0 }
+; CHECK-NEXT:         Execution Context: [N] -> {  : N > 0 }
 ; CHECK-NEXT: }
 ;
 ; CHECK:      Statements {
diff --git a/polly/test/ScopInfo/isl_trip_count_03.ll b/polly/test/ScopInfo/isl_trip_count_03.ll
index 61b29e4f4f8..ec9bc5fd59f 100644
--- a/polly/test/ScopInfo/isl_trip_count_03.ll
+++ b/polly/test/ScopInfo/isl_trip_count_03.ll
@@ -12,7 +12,7 @@
 ; CHECK:      Statements {
 ; CHECK-NEXT:     Stmt_for_next
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [n] -> { Stmt_for_next[i0] : i0 >= 0 and 2i0 <= -3 + n };
+; CHECK-NEXT:             [n] -> { Stmt_for_next[i0] : n > 0 and i0 >= 0 and 2i0 <= -3 + n };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [n] -> { Stmt_for_next[i0] -> [i0] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: +] [Scalar: 0]
diff --git a/polly/test/ScopInfo/loop-succ-cond.ll b/polly/test/ScopInfo/loop-succ-cond.ll
new file mode 100644
index 00000000000..c192dd681b8
--- /dev/null
+++ b/polly/test/ScopInfo/loop-succ-cond.ll
@@ -0,0 +1,77 @@
+; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
+; RUN: opt %loadPolly -polly-codegen -S < %s
+
+; Bugpoint-reduced from
+; test-suite/SingleSource/Benchmarks/Adobe-C++/loop_unroll.cpp
+;
+; Check that the loop %loop_start does not narrow the domain (the domain when
+; entering and leaving the loop must be identical)
+;
+; What happened in detail:
+;
+; 1) if.end5 checks %count whether there will be at least one iteration of
+;    loop_start. The domain condition added to loop_start therefore is
+;      [count] -> { [] : count > 0 }
+; 2) The loop exit condition of loop_start tests whether
+;    %indvars.iv.next64 == %0 (which is zext i32 %count to i64, NOT %count
+;    itself). %0 and %count have to be treated as independent parameters. The
+;    loop exit condition is
+;      [p_0] -> { [i0] : i0 = p_0 - 1 }
+; 3) Normalized loop induction variables are always non-negative. The domain
+;    condition for this is loop
+;      { [i0] : i0 >= 0 }
+; 4) The intersection of all three sets (condition of executing/entering loop,
+;    non-negative induction variables, loop exit condition) is
+;      [count, p_0] -> { [i0] : count > 0 and i0 >= 0 and i0 = p_0 - 1 }
+; 5) from which ISL can derive
+;     [count, p_0] -> { [i0] : p_0 > 0 }
+; 6) if.end5 is either executed when skipping the loop
+;    (domain [count] -> { [] : count <= 0 })
+;    or though the loop.
+; 7) Assuming the loop is guaranteed to exit, Polly computes the after-the-loop
+;    domain by taking the loop exit condition and projecting-out the induction
+;    variable. This yields
+;       [count, p_0] -> { [] : count > 0 and p_0 > 0 }
+; 8) The disjunction of both cases, 6) and 7)
+;    (the two incoming edges of if.end12) is
+;      [count, p_0] -> { [] : count <= 0 or (count > 0 and p_0 > 0) }
+; 9) Notice that if.end12 is logically _always_ executed in every scop
+;    execution. Both cases of if.end5 will eventually land in if.end12
+
+define void @func(i32 %count, float* %A) {
+entry:
+  %0 = zext i32 %count to i64
+  br i1 undef, label %if.end5.preheader, label %for.end
+
+if.end5.preheader:
+  %cmp6 = icmp sgt i32 %count, 0
+  br label %if.end5
+
+if.end5:
+  br i1 %cmp6, label %loop_start, label %if.end12
+
+loop_start:
+  %indvars.iv63 = phi i64 [ %indvars.iv.next64, %loop_start ], [ 0, %if.end5 ]
+  %add8 = add i32 undef, undef
+  %indvars.iv.next64 = add nuw nsw i64 %indvars.iv63, 1
+  %cmp9 = icmp eq i64 %indvars.iv.next64, %0
+  br i1 %cmp9, label %if.end12, label %loop_start
+
+if.end12:
+  store float 0.0, float* %A
+  br label %for.end
+
+for.end:
+  ret void
+}
+
+
+; CHECK:      Statements {
+; CHECK-NEXT:     Stmt_if_end12
+; CHECK-NEXT:         Domain :=
+; CHECK-NEXT:             [count, p_1] -> { Stmt_if_end12[] };
+; CHECK-NEXT:         Schedule :=
+; CHECK-NEXT:             [count, p_1] -> { Stmt_if_end12[] -> [] };
+; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
+; CHECK-NEXT:             [count, p_1] -> { Stmt_if_end12[] -> MemRef_A[0] };
+; CHECK-NEXT: }
diff --git a/polly/test/ScopInfo/phi_scalar_simple_1.ll b/polly/test/ScopInfo/phi_scalar_simple_1.ll
index 9ef9b370264..b35fcf1647b 100644
--- a/polly/test/ScopInfo/phi_scalar_simple_1.ll
+++ b/polly/test/ScopInfo/phi_scalar_simple_1.ll
@@ -17,16 +17,16 @@
 ; CHECK:      Statements {
 ; CHECK-NEXT:     Stmt_for_cond
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [N] -> { Stmt_for_cond[i0] : N >= 2 and 0 <= i0 < N; Stmt_for_cond[0] : N <= 1 };
+; CHECK-NEXT:             [N] -> { Stmt_for_cond[i0] : 0 <= i0 < N; Stmt_for_cond[0] : N <= 0 };
 ; CHECK-NEXT:         Schedule :=
-; CHECK-NEXT:             [N] -> { Stmt_for_cond[i0] -> [i0, 0, 0, 0] : N >= 2 and i0 < N; Stmt_for_cond[0] -> [0, 0, 0, 0] : N <= 1 };
+; CHECK-NEXT:             [N] -> { Stmt_for_cond[i0] -> [i0, 0, 0, 0] : i0 < N; Stmt_for_cond[0] -> [0, 0, 0, 0] : N <= 0 };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:             [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0__phi[] };
 ; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:             [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
 ; CHECK-NEXT:     Stmt_for_body
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [N] -> { Stmt_for_body[i0] : N >= 2 and 0 <= i0 <= -2 + N };
+; CHECK-NEXT:             [N] -> { Stmt_for_body[i0] : 0 <= i0 <= -2 + N };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [N] -> { Stmt_for_body[i0] -> [i0, 1, 0, 0] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
diff --git a/polly/test/ScopInfo/remarks.ll b/polly/test/ScopInfo/remarks.ll
index e35d38d4446..465d8e74ad3 100644
--- a/polly/test/ScopInfo/remarks.ll
+++ b/polly/test/ScopInfo/remarks.ll
@@ -1,10 +1,10 @@
 ; RUN: opt %loadPolly -pass-remarks-analysis="polly-scops" -polly-scops -disable-output < %s 2>&1 | FileCheck %s
 ;
 ; CHECK: remark: test/ScopInfo/remarks.c:4:7: SCoP begins here.
-; CHECK: remark: test/ScopInfo/remarks.c:8:5: Finite loop restriction:	[M, N, Debug] -> {  : N > 0 and (M <= -2 or M = -1) }
-; CHECK: remark: test/ScopInfo/remarks.c:13:7: No-error restriction:	[M, N, Debug] -> {  : M >= 0 and N > 0 and (Debug < 0 or Debug > 0) }
-; CHECK: remark: test/ScopInfo/remarks.c:9:7: Inbounds assumption:	[M, N, Debug] -> {  : M <= 100 or (M > 0 and N <= 0) }
-; CHECK: remark: <unknown>:0:0: No-overflows restriction:	[N, M, Debug] -> {  : M <= -2147483649 - N or M >= 2147483648 - N }
+; CHECK: remark: test/ScopInfo/remarks.c:8:5: Finite loop restriction:    [M, N, Debug] -> {  : M < 0 and N > 0 }
+; CHECK: remark: test/ScopInfo/remarks.c:13:7: No-error restriction:    [M, N, Debug] -> {  : M >= 0 and N > 0 and (Debug < 0 or Debug > 0) }
+; CHECK: remark: test/ScopInfo/remarks.c:9:7: Inbounds assumption:    [M, N, Debug] -> {  : M <= 100 or (M > 0 and N <= 0) }
+; CHECK: remark: <unknown>:0:0: No-overflows restriction:    [N, M, Debug] -> {  : M <= -2147483649 - N or M >= 2147483648 - N }
 ; CHECK: remark: test/ScopInfo/remarks.c:9:18: Possibly aliasing pointer, use restrict keyword.
 ; CHECK: remark: test/ScopInfo/remarks.c:9:33: Possibly aliasing pointer, use restrict keyword.
 ; CHECK: remark: test/ScopInfo/remarks.c:9:15: Possibly aliasing pointer, use restrict keyword.
diff --git a/polly/test/ScopInfo/switch-1.ll b/polly/test/ScopInfo/switch-1.ll
index 7d0d58e2b06..87668685e34 100644
--- a/polly/test/ScopInfo/switch-1.ll
+++ b/polly/test/ScopInfo/switch-1.ll
@@ -21,7 +21,7 @@
 ; CHECK:      Statements {
 ; CHECK-NEXT:     Stmt_sw_bb_1
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [N] -> { Stmt_sw_bb_1[i0] : 4*floor((-1 + i0)/4) = -1 + i0 and 0 < i0 < N };
+; CHECK-NEXT:             [N] -> { Stmt_sw_bb_1[i0] : 4*floor((-1 + i0)/4) = -1 + i0 and 0 <= i0 < N };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: +] [Scalar: 0]
@@ -30,7 +30,7 @@
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:     Stmt_sw_bb_2
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [N] -> { Stmt_sw_bb_2[i0] : 4*floor((-2 + i0)/4) = -2 + i0 and 2 <= i0 < N };
+; CHECK-NEXT:             [N] -> { Stmt_sw_bb_2[i0] : 4*floor((-2 + i0)/4) = -2 + i0 and 0 <= i0 < N };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb_2[i0] -> [i0, 1] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: +] [Scalar: 0]
@@ -50,18 +50,13 @@
 
 ; AST:      if (1)
 ;
-; AST:          {
-; AST-NEXT:       for (int c0 = 1; c0 < N - 2; c0 += 4) {
-; AST-NEXT:         Stmt_sw_bb_1(c0);
+; AST:          for (int c0 = 1; c0 < N; c0 += 4) {
+; AST-NEXT:       Stmt_sw_bb_1(c0);
+; AST-NEXT:       if (N >= c0 + 2) {
 ; AST-NEXT:         Stmt_sw_bb_2(c0 + 1);
-; AST-NEXT:         Stmt_sw_bb_6(c0 + 2);
+; AST-NEXT:         if (N >= c0 + 3)
+; AST-NEXT:           Stmt_sw_bb_6(c0 + 2);
 ; AST-NEXT:       }
-; AST-NEXT:       if (N >= 2)
-; AST-NEXT:         if (N % 4 >= 2) {
-; AST-NEXT:           Stmt_sw_bb_1(-(N % 4) + N + 1);
-; AST-NEXT:           if ((N - 3) % 4 == 0)
-; AST-NEXT:             Stmt_sw_bb_2(N - 1);
-; AST-NEXT:         }
 ; AST-NEXT:     }
 ;
 ; AST:      else
diff --git a/polly/test/ScopInfo/switch-2.ll b/polly/test/ScopInfo/switch-2.ll
index 062fe89688f..2cf31ee479e 100644
--- a/polly/test/ScopInfo/switch-2.ll
+++ b/polly/test/ScopInfo/switch-2.ll
@@ -29,7 +29,7 @@
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:     Stmt_sw_bb_2
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [N] -> { Stmt_sw_bb_2[i0] : 4*floor((-2 + i0)/4) = -2 + i0 and 2 <= i0 < N };
+; CHECK-NEXT:             [N] -> { Stmt_sw_bb_2[i0] : 4*floor((-2 + i0)/4) = -2 + i0 and 0 <= i0 < N };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb_2[i0] -> [i0, 0] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: +] [Scalar: 0]
@@ -40,10 +40,13 @@
 
 ; AST:      if (1)
 ;
-; AST:          for (int c0 = 0; c0 < N; c0 += 4) {
-; AST-NEXT:       Stmt_sw_bb(c0);
-; AST-NEXT:       if (N >= c0 + 3)
+; AST:          {
+; AST-NEXT:       for (int c0 = 0; c0 < N - 2; c0 += 4) {
+; AST-NEXT:         Stmt_sw_bb(c0);
 ; AST-NEXT:         Stmt_sw_bb_2(c0 + 2);
+; AST-NEXT:       }
+; AST-NEXT:       if (N >= 1 && (N + 1) % 4 >= 2)
+; AST-NEXT:         Stmt_sw_bb(-((N + 1) % 4) + N + 1);
 ; AST-NEXT:     }
 ;
 ; AST:      else
diff --git a/polly/test/ScopInfo/switch-3.ll b/polly/test/ScopInfo/switch-3.ll
index 1f8bd01d682..c6d0324de00 100644
--- a/polly/test/ScopInfo/switch-3.ll
+++ b/polly/test/ScopInfo/switch-3.ll
@@ -38,7 +38,7 @@
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:     Stmt_sw_bb_5
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [N] -> { Stmt_sw_bb_5[i0] : 4*floor((-2 + i0)/4) = -2 + i0 and 2 <= i0 < N };
+; CHECK-NEXT:             [N] -> { Stmt_sw_bb_5[i0] : 4*floor((-2 + i0)/4) = -2 + i0 and 0 <= i0 < N };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb_5[i0] -> [i0, 0] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: +] [Scalar: 0]
diff --git a/polly/test/ScopInfo/switch-4.ll b/polly/test/ScopInfo/switch-4.ll
index a111f9480a6..a6487d442aa 100644
--- a/polly/test/ScopInfo/switch-4.ll
+++ b/polly/test/ScopInfo/switch-4.ll
@@ -33,7 +33,7 @@
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:     Stmt_sw_bb_1
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [N] -> { Stmt_sw_bb_1[i0] : 4*floor((-1 + i0)/4) = -1 + i0 and 0 < i0 < N };
+; CHECK-NEXT:             [N] -> { Stmt_sw_bb_1[i0] : 4*floor((-1 + i0)/4) = -1 + i0 and 0 <= i0 < N };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: +] [Scalar: 0]
@@ -42,7 +42,7 @@
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };
 ; CHECK-NEXT:     Stmt_sw_bb_5
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [N] -> { Stmt_sw_bb_5[i0] : 4*floor((-2 + i0)/4) = -2 + i0 and 2 <= i0 < N };
+; CHECK-NEXT:             [N] -> { Stmt_sw_bb_5[i0] : 4*floor((-2 + i0)/4) = -2 + i0 and 0 <= i0 < N };
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [N] -> { Stmt_sw_bb_5[i0] -> [i0, 1] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: +] [Scalar: 0]
@@ -62,22 +62,16 @@
 
 ; AST:      if (1)
 ;
-; AST:          {
-; AST-NEXT:       for (int c0 = 0; c0 < N - 3; c0 += 4) {
-; AST-NEXT:         Stmt_sw_bb(c0);
+; AST:          for (int c0 = 0; c0 < N; c0 += 4) {
+; AST-NEXT:       Stmt_sw_bb(c0);
+; AST-NEXT:       if (N >= c0 + 2) {
 ; AST-NEXT:         Stmt_sw_bb_1(c0 + 1);
-; AST-NEXT:         Stmt_sw_bb_5(c0 + 2);
-; AST-NEXT:         Stmt_sw_bb_9(c0 + 3);
-; AST-NEXT:       }
-; AST-NEXT:       if (N >= 1)
-; AST-NEXT:         if (N % 4 >= 1) {
-; AST-NEXT:           Stmt_sw_bb(-(N % 4) + N);
-; AST-NEXT:           if (N % 4 >= 2) {
-; AST-NEXT:             Stmt_sw_bb_1(-(N % 4) + N + 1);
-; AST-NEXT:             if ((N - 3) % 4 == 0)
-; AST-NEXT:               Stmt_sw_bb_5(N - 1);
-; AST-NEXT:           }
+; AST-NEXT:         if (N >= c0 + 3) {
+; AST-NEXT:           Stmt_sw_bb_5(c0 + 2);
+; AST-NEXT:           if (N >= c0 + 4)
+; AST-NEXT:             Stmt_sw_bb_9(c0 + 3);
 ; AST-NEXT:         }
+; AST-NEXT:       }
 ; AST-NEXT:     }
 ;
 ; AST:      else