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authorBill Wendling <isanbard@gmail.com>2011-10-18 22:52:20 +0000
committerBill Wendling <isanbard@gmail.com>2011-10-18 22:52:20 +0000
commit4969dcdef9669ec15579891b6c6fe4bd3002e6cc (patch)
tree3f99f112c633e0c0323dcf948904cd1da07ccdd2
parent9bede2dd929bf1d3b7bd615e300549a2b196d29e (diff)
downloadbcm5719-llvm-4969dcdef9669ec15579891b6c6fe4bd3002e6cc.tar.gz
bcm5719-llvm-4969dcdef9669ec15579891b6c6fe4bd3002e6cc.zip
Use the integer compare when the value is small enough. Use the "move into a
register and then compare against that" method when it's too large. We have to move the value into the register in the "movw, movt" pair of instructions. llvm-svn: 142440
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp19
1 files changed, 17 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 759d3b6e0d6..236ea6f90a7 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -5672,9 +5672,7 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const {
MachineRegisterInfo *MRI = &MF->getRegInfo();
ARMFunctionInfo *AFI = MF->getInfo<ARMFunctionInfo>();
MachineFrameInfo *MFI = MF->getFrameInfo();
- MachineConstantPool *MCP = MF->getConstantPool();
int FI = MFI->getFunctionContextIndex();
- const Function *F = MF->getFunction();
const TargetRegisterClass *TRC =
Subtarget->isThumb() ? ARM::tGPRRegisterClass : ARM::GPRRegisterClass;
@@ -5863,6 +5861,23 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const {
.addImm(4)
.addMemOperand(FIMMOLd));
+ if (NumLPads < 256) {
+ AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPri))
+ .addReg(NewVReg1)
+ .addImm(NumLPads));
+ } else {
+ unsigned VReg1 = MRI->createVirtualRegister(TRC);
+ AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1)
+ .addImm(NumLPads & 0xFF));
+ unsigned VReg2 = MRI->createVirtualRegister(TRC);
+ AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVTi16), VReg2)
+ .addReg(VReg1)
+ .addImm(NumLPads >> 16));
+ AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr))
+ .addReg(NewVReg1)
+ .addReg(VReg2));
+ }
+
unsigned NewVReg2 = MRI->createVirtualRegister(TRC);
AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), NewVReg2)
.addImm(LPadList.size()));
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