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| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-20 22:40:40 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-20 22:40:40 +0000 |
| commit | 494fdf1499bfa970f2ed938007acc69bfcc03118 (patch) | |
| tree | da7a31dda05e18f8d4ae211b5fe6ab4f25e7dd64 | |
| parent | 8756816e6f3527db2cd2b46b8b7b49a707203803 (diff) | |
| download | bcm5719-llvm-494fdf1499bfa970f2ed938007acc69bfcc03118.tar.gz bcm5719-llvm-494fdf1499bfa970f2ed938007acc69bfcc03118.zip | |
32-to-64-bit sext_inreg pattern.
llvm-svn: 147004
| -rw-r--r-- | llvm/lib/Target/Mips/Mips64InstrInfo.td | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/mips64ext.ll | 8 |
2 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td index c58eade4714..681c7ae1bce 100644 --- a/llvm/lib/Target/Mips/Mips64InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips64InstrInfo.td @@ -215,6 +215,8 @@ def DSLL64_32 : FR<0x3c, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt), def SLL64_32 : FR<0x0, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt), "sll\t$rd, $rt, 0", [], IIAlu>; +def SLL64_64 : FR<0x0, 0x00, (outs CPU64Regs:$rd), (ins CPU64Regs:$rt), + "sll\t$rd, $rt, 0", [], IIAlu>; //===----------------------------------------------------------------------===// // Arbitrary patterns that map to one or more instructions @@ -311,3 +313,6 @@ def : Pat<(i64 (anyext CPURegs:$src)), (SLL64_32 CPURegs:$src)>; def : Pat<(i64 (zext CPURegs:$src)), (DSRL (DSLL64_32 CPURegs:$src), 32)>; def : Pat<(i64 (sext CPURegs:$src)), (SLL64_32 CPURegs:$src)>; +// Sign extend in register +def : Pat<(i64 (sext_inreg CPU64Regs:$src, i32)), (SLL64_64 CPU64Regs:$src)>; + diff --git a/llvm/test/CodeGen/Mips/mips64ext.ll b/llvm/test/CodeGen/Mips/mips64ext.ll index ae6078b829c..7981ec7a473 100644 --- a/llvm/test/CodeGen/Mips/mips64ext.ll +++ b/llvm/test/CodeGen/Mips/mips64ext.ll @@ -9,3 +9,11 @@ entry: %conv = zext i32 %add to i64 ret i64 %conv } + +define i64 @sext64_32(i32 %a) nounwind readnone { +entry: +; CHECK: sll ${{[0-9]+}}, ${{[0-9]+}}, 0 + %conv = sext i32 %a to i64 + ret i64 %conv +} + |
