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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-04-13 00:45:02 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-04-13 00:45:02 +0000 |
| commit | 48996b0608b5e89c8176d102eede0ee3254f20f4 (patch) | |
| tree | 96f72e2a1152b5881f23e518cef96f1d5e031d9d | |
| parent | 6da24a2e8b1fceb91d59d3e2a6c1bd81ebf94278 (diff) | |
| download | bcm5719-llvm-48996b0608b5e89c8176d102eede0ee3254f20f4.tar.gz bcm5719-llvm-48996b0608b5e89c8176d102eede0ee3254f20f4.zip | |
[mips] Override TargetLoweringBase::isShuffleMaskLegal.
llvm-svn: 179433
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEISelLowering.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.h b/llvm/lib/Target/Mips/MipsSEISelLowering.h index 186f6a343de..90e83330a77 100644 --- a/llvm/lib/Target/Mips/MipsSEISelLowering.h +++ b/llvm/lib/Target/Mips/MipsSEISelLowering.h @@ -31,6 +31,11 @@ namespace llvm { virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const; + virtual bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask, + EVT VT) const { + return false; + } + virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const { if (VT == MVT::Untyped) return Subtarget->hasDSP() ? &Mips::ACRegsDSPRegClass : |
