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| author | Volkan Keles <vkeles@apple.com> | 2017-03-14 23:45:06 +0000 |
|---|---|---|
| committer | Volkan Keles <vkeles@apple.com> | 2017-03-14 23:45:06 +0000 |
| commit | 4862c635948aca849f75af94751aac00ad404d4d (patch) | |
| tree | 5d0d17970941b304dcd37d5558714cc40cbe3248 | |
| parent | 858b25e2c7ee0be3caf3205b428709649ac1111c (diff) | |
| download | bcm5719-llvm-4862c635948aca849f75af94751aac00ad404d4d.tar.gz bcm5719-llvm-4862c635948aca849f75af94751aac00ad404d4d.zip | |
[GlobalISel] IRTranslator: Return the scalar for <1 x Ty> constant vectors
Summary:
<1 x Ty> is not a legal vector type in LLT, we shouldn’t build G_MERGE_VALUES
instruction for them.
Reviewers: qcolombet, aditya_nandakumar, dsanders, t.p.northover, ab, javed.absar
Reviewed By: qcolombet
Subscribers: dberris, rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D30948
llvm-svn: 297792
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll | 24 |
2 files changed, 30 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 15bf31cd6d6..3b926a34aaf 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1068,6 +1068,9 @@ bool IRTranslator::translate(const Constant &C, unsigned Reg) { else if (auto CAZ = dyn_cast<ConstantAggregateZero>(&C)) { if (!CAZ->getType()->isVectorTy()) return false; + // Return the scalar if it is a <1 x Ty> vector. + if (CAZ->getNumElements() == 1) + return translate(*CAZ->getElementValue(0u), Reg); std::vector<unsigned> Ops; for (unsigned i = 0; i < CAZ->getNumElements(); ++i) { Constant &Elt = *CAZ->getElementValue(i); @@ -1075,6 +1078,9 @@ bool IRTranslator::translate(const Constant &C, unsigned Reg) { } EntryBuilder.buildMerge(Reg, Ops); } else if (auto CV = dyn_cast<ConstantDataVector>(&C)) { + // Return the scalar if it is a <1 x Ty> vector. + if (CV->getNumElements() == 1) + return translate(*CV->getElementAsConstant(0), Reg); std::vector<unsigned> Ops; for (unsigned i = 0; i < CV->getNumElements(); ++i) { Constant &Elt = *CV->getElementAsConstant(i); diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index 8003cb95a3c..8d199cc290e 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -1368,3 +1368,27 @@ define <2 x double> @test_constantdatavector_v2f64() { ; CHECK: %q0 = COPY [[VEC]](<2 x s64>) ret <2 x double> <double 1.0, double 2.0> } + +define i32 @test_constantaggzerovector_v1s32(i32 %arg){ +; CHECK-LABEL: name: test_constantaggzerovector_v1s32 +; CHECK: [[ARG:%[0-9]+]](s32) = COPY %w0 +; CHECK: [[C0:%[0-9]+]](s32) = G_CONSTANT i32 0 +; CHECK-NOT: G_MERGE_VALUES +; CHECK: G_ADD [[ARG]], [[C0]] + %vec = insertelement <1 x i32> undef, i32 %arg, i32 0 + %add = add <1 x i32> %vec, zeroinitializer + %res = extractelement <1 x i32> %add, i32 0 + ret i32 %res +} + +define i32 @test_constantdatavector_v1s32(i32 %arg){ +; CHECK-LABEL: name: test_constantdatavector_v1s32 +; CHECK: [[ARG:%[0-9]+]](s32) = COPY %w0 +; CHECK: [[C1:%[0-9]+]](s32) = G_CONSTANT i32 1 +; CHECK-NOT: G_MERGE_VALUES +; CHECK: G_ADD [[ARG]], [[C1]] + %vec = insertelement <1 x i32> undef, i32 %arg, i32 0 + %add = add <1 x i32> %vec, <i32 1> + %res = extractelement <1 x i32> %add, i32 0 + ret i32 %res +} |
