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authorJuergen Ributzka <juergen@apple.com>2014-02-21 23:29:32 +0000
committerJuergen Ributzka <juergen@apple.com>2014-02-21 23:29:32 +0000
commit4845b488f193c72a97664a9073e32506d96b211b (patch)
treeb7954f1b167f6b9de1b61cf20bd06e586e01ef1e
parentfa1a4320af9aee41202321c054911b5abd7c274b (diff)
downloadbcm5719-llvm-4845b488f193c72a97664a9073e32506d96b211b.tar.gz
bcm5719-llvm-4845b488f193c72a97664a9073e32506d96b211b.zip
[Stackmaps] Move the target-independent frame index elimination for stackmaps and patchpoints into target-specific code.
The lowering of the frame index for stackmaps and patchpoints requires some target-specific magic and should therefore be handled in the target-specific eliminateFrameIndex method. This is related to <rdar://problem/16106219> llvm-svn: 201904
-rw-r--r--llvm/lib/CodeGen/PrologEpilogInserter.cpp15
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.cpp9
2 files changed, 15 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index 1215e5a5d16..f93195625b8 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -779,18 +779,15 @@ void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &Fn,
// Frame indicies in debug values are encoded in a target independent
// way with simply the frame index and offset rather than any
// target-specific addressing mode.
- if (MI->isDebugValue() ||
- MI->getOpcode() == TargetOpcode::STACKMAP ||
- MI->getOpcode() == TargetOpcode::PATCHPOINT) {
- assert((!MI->isDebugValue() || i == 0) &&
- "Frame indicies can only appear as the first operand of a "
- "DBG_VALUE machine instruction");
+ if (MI->isDebugValue()) {
+ assert(i == 0 && "Frame indicies can only appear as the first "
+ "operand of a DBG_VALUE machine instruction");
unsigned Reg;
- MachineOperand &Offset = MI->getOperand(i + 1);
+ MachineOperand &Offset = MI->getOperand(1);
Offset.setImm(Offset.getImm() +
TFI->getFrameIndexReference(
- Fn, MI->getOperand(i).getIndex(), Reg));
- MI->getOperand(i).ChangeToRegister(Reg, false /*isDef*/);
+ Fn, MI->getOperand(0).getIndex(), Reg));
+ MI->getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
continue;
}
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 8a65dc1f2f7..43057c0fdf6 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -516,6 +516,15 @@ X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
} else
FIOffset = TFI->getFrameIndexOffset(MF, FrameIndex);
+ // The frame index format for stackmaps and patchpoints is different from the
+ // X86 format. It only has a FI and an offset.
+ if (Opc == TargetOpcode::STACKMAP || Opc == TargetOpcode::PATCHPOINT) {
+ assert(BasePtr == FramePtr && "Expected the FP as base register");
+ int64_t Offset = MI.getOperand(FIOperandNum + 1).getImm() + FIOffset;
+ MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
+ return;
+ }
+
if (MI.getOperand(FIOperandNum+3).isImm()) {
// Offset is a 32-bit integer.
int Imm = (int)(MI.getOperand(FIOperandNum + 3).getImm());
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