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| author | Alex Bradbury <asb@lowrisc.org> | 2018-11-30 14:10:52 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2018-11-30 14:10:52 +0000 |
| commit | 4830fdd21afd9e4f15cd610422ccab760779ef98 (patch) | |
| tree | d3545a1060b023ab91f23fb2ea51603499c3ed4d | |
| parent | de4b88e5ac6dc875e85286f83aae2e600d1eaabe (diff) | |
| download | bcm5719-llvm-4830fdd21afd9e4f15cd610422ccab760779ef98.tar.gz bcm5719-llvm-4830fdd21afd9e4f15cd610422ccab760779ef98.zip | |
[RISCV] Add additional CSR instruction aliases (imm. operands)
This patch adds CSR instructions aliases for the cases where the instruction
takes an immediate operand but the alias doesn't have the i suffix. This is
necessary for gas/gcc compatibility.
gas doesn't do a similar conversion for fsflags or fsrm, so this should be
complete.
Differential Revision: https://reviews.llvm.org/D55008
Patch by Luís Marques.
llvm-svn: 347991
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrInfo.td | 10 | ||||
| -rw-r--r-- | llvm/test/MC/RISCV/rvi-aliases-valid.s | 20 |
2 files changed, 30 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td index 90f8c97bf64..9dbf8c6d88f 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td @@ -580,6 +580,16 @@ def : InstAlias<"csrwi $csr, $imm", (CSRRWI X0, csr_sysreg:$csr, uimm5:$imm)>; def : InstAlias<"csrsi $csr, $imm", (CSRRSI X0, csr_sysreg:$csr, uimm5:$imm)>; def : InstAlias<"csrci $csr, $imm", (CSRRCI X0, csr_sysreg:$csr, uimm5:$imm)>; +let EmitPriority = 0 in { +def : InstAlias<"csrw $csr, $imm", (CSRRWI X0, csr_sysreg:$csr, uimm5:$imm)>; +def : InstAlias<"csrs $csr, $imm", (CSRRSI X0, csr_sysreg:$csr, uimm5:$imm)>; +def : InstAlias<"csrc $csr, $imm", (CSRRCI X0, csr_sysreg:$csr, uimm5:$imm)>; + +def : InstAlias<"csrrw $rd, $csr, $imm", (CSRRWI GPR:$rd, csr_sysreg:$csr, uimm5:$imm)>; +def : InstAlias<"csrrs $rd, $csr, $imm", (CSRRSI GPR:$rd, csr_sysreg:$csr, uimm5:$imm)>; +def : InstAlias<"csrrc $rd, $csr, $imm", (CSRRCI GPR:$rd, csr_sysreg:$csr, uimm5:$imm)>; +} + def : InstAlias<"sfence.vma", (SFENCE_VMA X0, X0)>; def : InstAlias<"sfence.vma $rs", (SFENCE_VMA GPR:$rs, X0)>; diff --git a/llvm/test/MC/RISCV/rvi-aliases-valid.s b/llvm/test/MC/RISCV/rvi-aliases-valid.s index 4acabe216a1..a4aef05f8be 100644 --- a/llvm/test/MC/RISCV/rvi-aliases-valid.s +++ b/llvm/test/MC/RISCV/rvi-aliases-valid.s @@ -181,6 +181,26 @@ csrsi 0xfff, 0x10 # CHECK-S-OBJ: csrci sscratch, 17 csrci 0x140, 0x11 +# CHECK-S-OBJ-NOALIAS: csrrwi zero, 336, 7 +# CHECK-S-OBJ: csrwi 336, 7 +csrw 0x150, 7 +# CHECK-S-OBJ-NOALIAS: csrrsi zero, 336, 7 +# CHECK-S-OBJ: csrsi 336, 7 +csrs 0x150, 7 +# CHECK-S-OBJ-NOALIAS: csrrci zero, 336, 7 +# CHECK-S-OBJ: csrci 336, 7 +csrc 0x150, 7 + +# CHECK-S-OBJ-NOALIAS: csrrwi t0, 336, 15 +# CHECK-S-OBJ: csrrwi t0, 336, 15 +csrrw t0, 0x150, 0xf +# CHECK-S-OBJ-NOALIAS: csrrsi t0, 4095, 16 +# CHECK-S-OBJ: csrrsi t0, 4095, 16 +csrrs t0, 0xfff, 0x10 +# CHECK-S-OBJ-NOALIAS: csrrci t0, sscratch, 17 +# CHECK-S-OBJ: csrrci t0, sscratch, 17 +csrrc t0, 0x140, 0x11 + # CHECK-S-OBJ-NOALIAS: sfence.vma zero, zero # CHECK-S-OBJ: sfence.vma sfence.vma |

