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| author | Azharuddin Mohammed <azharudd@codeaurora.org> | 2017-03-12 14:02:32 +0000 |
|---|---|---|
| committer | Azharuddin Mohammed <azharudd@codeaurora.org> | 2017-03-12 14:02:32 +0000 |
| commit | 473b75c3d51d7eaf52ae678d0c2f576ea3306a5a (patch) | |
| tree | 1ebda5742c9e566ff747bce7ed8104aacd5fb962 | |
| parent | 293dfb97680001b1c4935c5a26fc252f169bb786 (diff) | |
| download | bcm5719-llvm-473b75c3d51d7eaf52ae678d0c2f576ea3306a5a.tar.gz bcm5719-llvm-473b75c3d51d7eaf52ae678d0c2f576ea3306a5a.zip | |
Remove CRC32 instructions from AArch64InstrInfo::hasShiftedReg
Summary:
A53 scheduler causes an assertion failure on all CRC instructions:
include/llvm/CodeGen/MachineInstr.h:280: const llvm::MachineOperand
&llvm::MachineInstr::getOperand(unsigned int) const: Assertion `i <
getNumOperands() && "getOperand() out of range!"' failed.
The case statements corresponding to CRC instructions are incorrect and should
be removed.
Also adding a testcase while on this.
Reviewers: t.p.northover, javed.absar, apazos, rengolin
Reviewed By: rengolin
Subscribers: evandro, aemerson, llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D30274
llvm-svn: 297582
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-crc32.ll | 1 |
2 files changed, 1 insertions, 8 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp index d1885095238..6adf9f28b83 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -1345,14 +1345,6 @@ bool AArch64InstrInfo::hasShiftedReg(const MachineInstr &MI) const { case AArch64::BICSXrs: case AArch64::BICWrs: case AArch64::BICXrs: - case AArch64::CRC32Brr: - case AArch64::CRC32CBrr: - case AArch64::CRC32CHrr: - case AArch64::CRC32CWrr: - case AArch64::CRC32CXrr: - case AArch64::CRC32Hrr: - case AArch64::CRC32Wrr: - case AArch64::CRC32Xrr: case AArch64::EONWrs: case AArch64::EONXrs: case AArch64::EORWrs: diff --git a/llvm/test/CodeGen/AArch64/arm64-crc32.ll b/llvm/test/CodeGen/AArch64/arm64-crc32.ll index 22111de5a3a..df9465a6bda 100644 --- a/llvm/test/CodeGen/AArch64/arm64-crc32.ll +++ b/llvm/test/CodeGen/AArch64/arm64-crc32.ll @@ -1,4 +1,5 @@ ; RUN: llc -mtriple=arm64-eabi -mattr=+crc -o - %s | FileCheck %s +; RUN: llc -mtriple=arm64-eabi -mcpu=cortex-a53 -mattr=+crc -o - %s | FileCheck %s define i32 @test_crc32b(i32 %cur, i8 %next) { ; CHECK-LABEL: test_crc32b: |
