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authorFangrui Song <maskray@google.com>2019-06-17 09:59:55 +0000
committerFangrui Song <maskray@google.com>2019-06-17 09:59:55 +0000
commit46f9cbe28d4f5b56c5e0c65a4fb02571a57fc8ae (patch)
tree8006729f13931c3358eb1d3c7603d93383841317
parentac14f7b10cffe2be548607269e036244cd16acc3 (diff)
downloadbcm5719-llvm-46f9cbe28d4f5b56c5e0c65a4fb02571a57fc8ae.tar.gz
bcm5719-llvm-46f9cbe28d4f5b56c5e0c65a4fb02571a57fc8ae.zip
[llvm-objdump] Use %08 instead of %016 to print leading addresses for 32-bit binaries
Reviewed By: grimar Differential Revision: https://reviews.llvm.org/D63398 llvm-svn: 363539
-rw-r--r--lld/test/ELF/arm-thunk-multipass-plt.s14
-rw-r--r--lld/test/ELF/arm-tls-gd32.s2
-rw-r--r--lld/test/ELF/gnu-ifunc-noplt-i386.s12
-rw-r--r--lld/test/ELF/ppc32-call-stub-nopic.s2
-rw-r--r--lld/test/ELF/ppc32-call-stub-pic.s2
-rw-r--r--llvm/test/MC/COFF/cv-loc-unreachable-2.s2
-rw-r--r--llvm/test/MC/COFF/cv-loc-unreachable.s2
-rw-r--r--llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s4
-rw-r--r--llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s35
-rw-r--r--llvm/tools/llvm-objdump/llvm-objdump.cpp13
10 files changed, 46 insertions, 42 deletions
diff --git a/lld/test/ELF/arm-thunk-multipass-plt.s b/lld/test/ELF/arm-thunk-multipass-plt.s
index 085126b4ecc..ea1b9b6a6af 100644
--- a/lld/test/ELF/arm-thunk-multipass-plt.s
+++ b/lld/test/ELF/arm-thunk-multipass-plt.s
@@ -42,7 +42,7 @@ needsplt:
.section .text.07, "ax", %progbits
.space (1024 * 1024)
// 0x70000c + 8 + 0x60002c = 0xd00040 = preemptible@plt
-// CHECK: 000000000070000c __ARMV5PILongThunk_preemptible:
+// CHECK: 0070000c __ARMV5PILongThunk_preemptible:
// CHECK-NEXT: 70000c: 0b 00 18 ea b #6291500
.section .text.08, "ax", %progbits
@@ -71,25 +71,25 @@ preemptible2:
// CHECK-PLT: Disassembly of section .plt:
// CHECK-PLT-EMPTY:
-// CHECK-PLT-NEXT: 0000000000d00020 $a:
+// CHECK-PLT-NEXT: 00d00020 $a:
// CHECK-PLT-NEXT: d00020: 04 e0 2d e5 str lr, [sp, #-4]!
// CHECK-PLT-NEXT: d00024: 00 e6 8f e2 add lr, pc, #0, #12
// CHECK-PLT-NEXT: d00028: 01 ea 8e e2 add lr, lr, #4096
// CHECK-PLT-NEXT: d0002c: dc ff be e5 ldr pc, [lr, #4060]!
-// CHECK-PLT: 0000000000d00030 $d:
+// CHECK-PLT: 00d00030 $d:
// CHECK-PLT-NEXT: d00030: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-PLT-NEXT: d00034: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-PLT-NEXT: d00038: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK-PLT-NEXT: d0003c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-PLT: 0000000000d00040 $a:
+// CHECK-PLT: 00d00040 $a:
// CHECK-PLT-NEXT: d00040: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK-PLT-NEXT: d00044: 01 ca 8c e2 add r12, r12, #4096
// CHECK-PLT-NEXT: d00048: c4 ff bc e5 ldr pc, [r12, #4036]!
-// CHECK-PLT: 0000000000d0004c $d:
+// CHECK-PLT: 00d0004c $d:
// CHECK-PLT-NEXT: d0004c: d4 d4 d4 d4 .word 0xd4d4d4d4
-// CHECK-PLT: 0000000000d00050 $a:
+// CHECK-PLT: 00d00050 $a:
// CHECK-PLT-NEXT: d00050: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK-PLT-NEXT: d00054: 01 ca 8c e2 add r12, r12, #4096
// CHECK-PLT-NEXT: d00058: b8 ff bc e5 ldr pc, [r12, #4024]!
-// CHECK-PLT: 0000000000d0005c $d:
+// CHECK-PLT: 00d0005c $d:
// CHECK-PLT-NEXT: d0005c: d4 d4 d4 d4 .word 0xd4d4d4d4
diff --git a/lld/test/ELF/arm-tls-gd32.s b/lld/test/ELF/arm-tls-gd32.s
index 80784e57432..edbc6a54e0d 100644
--- a/lld/test/ELF/arm-tls-gd32.s
+++ b/lld/test/ELF/arm-tls-gd32.s
@@ -91,7 +91,7 @@ x:
// SEC-NEXT: 0x2058 R_ARM_TLS_DTPOFF32 y
-// CHECK-LABEL: 0000000000001000 func:
+// CHECK-LABEL: 00001000 func:
// CHECK-NEXT: 1000: 00 f0 20 e3 nop
// CHECK-NEXT: 1004: 00 f0 20 e3 nop
// CHECK-NEXT: 1008: 00 f0 20 e3 nop
diff --git a/lld/test/ELF/gnu-ifunc-noplt-i386.s b/lld/test/ELF/gnu-ifunc-noplt-i386.s
index d5e8c8e917a..d673fc00cb3 100644
--- a/lld/test/ELF/gnu-ifunc-noplt-i386.s
+++ b/lld/test/ELF/gnu-ifunc-noplt-i386.s
@@ -20,13 +20,13 @@
// Check that ifunc call sites still require relocation
// DISASM: Disassembly of section .text:
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401000 foo:
+// DISASM-NEXT: 00401000 foo:
// DISASM-NEXT: 401000: retl
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401001 bar:
+// DISASM-NEXT: 00401001 bar:
// DISASM-NEXT: 401001: retl
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401002 _start:
+// DISASM-NEXT: 00401002 _start:
// DISASM-NEXT: 401002: calll -4 <_start+0x1>
// DISASM-NEXT: 401007: calll -4 <_start+0x6>
// DISASM-NEXT: 40100c: calll 31 <bar2@plt>
@@ -34,7 +34,7 @@
// DISASM-EMPTY:
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401020 .plt:
+// DISASM-NEXT: 00401020 .plt:
// DISASM-NEXT: 401020: pushl 4206596
// DISASM-NEXT: 401026: jmpl *4206600
// DISASM-NEXT: 40102c: nop
@@ -42,12 +42,12 @@
// DISASM-NEXT: 40102e: nop
// DISASM-NEXT: 40102f: nop
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401030 bar2@plt:
+// DISASM-NEXT: 00401030 bar2@plt:
// DISASM-NEXT: 401030: jmpl *4206604
// DISASM-NEXT: 401036: pushl $0
// DISASM-NEXT: 40103b: jmp -32 <.plt>
// DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401040 zed2@plt:
+// DISASM-NEXT: 00401040 zed2@plt:
// DISASM-NEXT: 401040: jmpl *4206608
// DISASM-NEXT: 401046: pushl $8
// DISASM-NEXT: 40104b: jmp -48 <.plt>
diff --git a/lld/test/ELF/ppc32-call-stub-nopic.s b/lld/test/ELF/ppc32-call-stub-nopic.s
index 461966aeaa3..2d788adbace 100644
--- a/lld/test/ELF/ppc32-call-stub-nopic.s
+++ b/lld/test/ELF/ppc32-call-stub-nopic.s
@@ -46,7 +46,7 @@
# HEX: 0x10030000 10010040 10010044
## These instructions are referenced by .plt entries.
-# CHECK: 0000000010010040 .glink:
+# CHECK: 10010040 .glink:
# CHECK-NEXT: b .+8
# CHECK-NEXT: b .+4
diff --git a/lld/test/ELF/ppc32-call-stub-pic.s b/lld/test/ELF/ppc32-call-stub-pic.s
index f6891516dfd..30d5192a3ee 100644
--- a/lld/test/ELF/ppc32-call-stub-pic.s
+++ b/lld/test/ELF/ppc32-call-stub-pic.s
@@ -95,7 +95,7 @@
# HEX: 0x0003fff8 00010090 00010094 00010098
## These instructions are referenced by .plt entries.
-# CHECK: 0000000000010090 .glink:
+# CHECK: 00010090 .glink:
# CHECK-NEXT: b .+12
# CHECK-NEXT: b .+8
# CHECK-NEXT: b .+4
diff --git a/llvm/test/MC/COFF/cv-loc-unreachable-2.s b/llvm/test/MC/COFF/cv-loc-unreachable-2.s
index 66e8da4fa14..146158f713a 100644
--- a/llvm/test/MC/COFF/cv-loc-unreachable-2.s
+++ b/llvm/test/MC/COFF/cv-loc-unreachable-2.s
@@ -6,7 +6,7 @@
# section afterwards. We had negative label difference assertions when .cv_loc
# bound tightly to the next instruction.
-# ASM: 0000000000000000 _callit:
+# ASM: 00000000 _callit:
# begin inline {
# ASM-NEXT: 0: e8 00 00 00 00 calll 0 <_callit+0x5>
# ASM-NEXT: 5: 85 c0 testl %eax, %eax
diff --git a/llvm/test/MC/COFF/cv-loc-unreachable.s b/llvm/test/MC/COFF/cv-loc-unreachable.s
index 7a14a2d6002..5ac73e37742 100644
--- a/llvm/test/MC/COFF/cv-loc-unreachable.s
+++ b/llvm/test/MC/COFF/cv-loc-unreachable.s
@@ -17,7 +17,7 @@
# }
-# ASM: 0000000000000000 _callit:
+# ASM: 00000000 _callit:
# begin inline {
# ASM-NEXT: 0: e8 00 00 00 00 calll 0 <_callit+0x5>
# ASM-NEXT: 5: 85 c0 testl %eax, %eax
diff --git a/llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s b/llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s
index b0b3f05f9cd..7843fca1c9b 100644
--- a/llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s
+++ b/llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s
@@ -7,10 +7,10 @@
# RUN: llvm-mc -triple=powerpc-unknown-linux -filetype=obj %s -o %t.o
# RUN: llvm-objdump -d %t.o | FileCheck %s
-# CHECK: 0000000000000000 callee_back:
+# CHECK: {{0*}}00000000 callee_back:
# CHECK: 18: {{.*}} bl .-24
# CHECK: 20: {{.*}} bl .+16
-# CHECK: 0000000000000030 callee_forward:
+# CHECK: {{0*}}00000030 callee_forward:
.text
.global caller
diff --git a/llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s b/llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s
index 41d3b0657f3..322f49f7f49 100644
--- a/llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s
+++ b/llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s
@@ -1,20 +1,25 @@
-// RUN: llvm-mc %s -filetype=obj -triple=x86_64-pc-linux -o %t.o
+# RUN: llvm-mc %s -filetype=obj -triple=i386 -o %t.32.o
+# RUN: llvm-mc %s -filetype=obj -triple=x86_64 -o %t.64.o
-// Check we print the address of `foo` and `bar`.
-// RUN: llvm-objdump -d %t.o | FileCheck %s
-// CHECK: 0000000000000000 foo:
-// CHECK-NEXT: 0: {{.*}} nop
-// CHECK-NEXT: 1: {{.*}} nop
-// CHECK: 0000000000000002 bar:
-// CHECK-NEXT: 2: {{.*}} nop
+## Check we print the address of `foo` and `bar`.
+# RUN: llvm-objdump -d %t.32.o | FileCheck --check-prefixes=ADDR32,ADDR %s
+# RUN: llvm-objdump -d %t.64.o | FileCheck --check-prefixes=ADDR64,ADDR %s
+# ADDR32: 00000000 foo:
+# ADDR64: 0000000000000000 foo:
+# ADDR-NEXT: 0: {{.*}} nop
+# ADDR-NEXT: 1: {{.*}} nop
+# ADDR32: 00000002 bar:
+# ADDR64: 0000000000000002 bar:
+# ADDR-NEXT: 2: {{.*}} nop
-// Check we do not print the addresses with -no-leading-addr.
-// RUN: llvm-objdump -d --no-leading-addr %t.o | FileCheck %s --check-prefix=NOADDR
-// NOADDR: {{^}}foo:
-// NOADDR-NEXT: {{.*}} nop
-// NOADDR-NEXT: {{.*}} nop
-// NOADDR: {{^}}bar:
-// NOADDR-NEXT: {{.*}} nop
+## Check we do not print the addresses with --no-leading-addr.
+# RUN: llvm-objdump -d --no-leading-addr %t.32.o | FileCheck %s --check-prefix=NOADDR
+# RUN: llvm-objdump -d --no-leading-addr %t.64.o | FileCheck %s --check-prefix=NOADDR
+# NOADDR: {{^}}foo:
+# NOADDR-NEXT: {{.*}} nop
+# NOADDR-NEXT: {{.*}} nop
+# NOADDR: {{^}}bar:
+# NOADDR-NEXT: {{.*}} nop
.text
.globl foo
diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
index 1d211d61611..7305f2bf634 100644
--- a/llvm/tools/llvm-objdump/llvm-objdump.cpp
+++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -612,9 +612,8 @@ static bool isArmElf(const ObjectFile *Obj) {
}
static void printRelocation(const RelocationRef &Rel, uint64_t Address,
- uint8_t AddrSize) {
- StringRef Fmt =
- AddrSize > 4 ? "\t\t%016" PRIx64 ": " : "\t\t\t%08" PRIx64 ": ";
+ bool Is64Bits) {
+ StringRef Fmt = Is64Bits ? "\t\t%016" PRIx64 ": " : "\t\t\t%08" PRIx64 ": ";
SmallString<16> Name;
SmallString<32> Val;
Rel.getTypeName(Name);
@@ -704,7 +703,7 @@ public:
auto PrintReloc = [&]() -> void {
while ((RelCur != RelEnd) && (RelCur->getOffset() <= Address.Address)) {
if (RelCur->getOffset() == Address.Address) {
- printRelocation(*RelCur, Address.Address, 4);
+ printRelocation(*RelCur, Address.Address, false);
return;
}
++RelCur;
@@ -1032,6 +1031,7 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
std::map<SectionRef, std::vector<RelocationRef>> RelocMap;
if (InlineRelocs)
RelocMap = getRelocsMap(*Obj);
+ bool Is64Bits = Obj->getBytesInAddress() > 4;
// Create a mapping from virtual address to symbol name. This is used to
// pretty print the symbols while disassembling.
@@ -1229,7 +1229,7 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
outs() << '\n';
if (!NoLeadingAddr)
- outs() << format("%016" PRIx64 " ",
+ outs() << format(Is64Bits ? "%016" PRIx64 " " : "%08" PRIx64 " ",
SectionAddr + Start + VMAAdjustment);
StringRef SymbolName = std::get<1>(Symbols[SI]);
@@ -1401,8 +1401,7 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
Offset += AdjustVMA;
}
- printRelocation(*RelCur, SectionAddr + Offset,
- Obj->getBytesInAddress());
+ printRelocation(*RelCur, SectionAddr + Offset, Is64Bits);
++RelCur;
}
}
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